ISL6406_07 Datasheet, PDF (9/18 Pages) Intersil Corporation – Single Synchronous Buck Pulse-Width Modulation (PWM) Controller

ISL6406
.
+3.3V
VCC
ISL6406,
VIN
CPVOUT
BOOT
UGATE
PHASE
LGATE
D1
C4
Q1
L_OUT
Q2
+
C_OUT
FB
COMP
C1
R1
C3
C2 R2
R4
V_OUT
R3
converter’s efficiency and reduces cost by eliminating a
current sensing resistor. The over current function cycles the
soft-start function in a hiccup mode to provide fault
protection. A resistor (R_OCSET) programs the over current
trip level (see Typical Application diagrams). An internal
20µA (typical) current sink develops a voltage across
R_OCSET that is referenced to V_IN. When the voltage across
the upper MOSFET (also referenced to V_IN) exceeds the
voltage across R_OCSET, the over current function initiates a
soft-start sequence.
V_OUT (2.5V)
0V
FIGURE 4. OUTPUT VOLTAGE SELECTION
Frequency Synchronization and Enable
The external frequency synchronization and enable
functions are combined in SYNC/EN pin. This pin is TTL
compatible for VCC = 3.3V or 5V. The device is disabled if
the input to this pin is TTL LOW for more than 40μs (typ.); it
is enabled if the input is TTL HIGH without delay. When
disabling the IC, the charge pump is turned off and the
BOOT pin is left charged at ~5V. In some cases this charge
will inadvertant leak through the upper gate driver and can
possibly turn on the upper FET. To avoid this, it is
recommended that a 1MΩ ‘bleed’ resistor be connected from
the BOOT pin to GND. This resistor is shown in the typical
application schematic in page 4 as R_BOOT.
The SYNC/EN pin is monitored by the internal timer. The
timer allows SYNC pulses (TTL LOW level) to pass through,
as long as the pulses are shorter than 22μs. The minimum
SYNC pulse width is 40ns (typ.).
The oscillator can SYNC to an external frequency of
between 1.1 times and 2.0 times the free-running frequency.
Loop acquisition time is about 200 clock cycles. The timing
resistor (RT) is always required, regardless of whether
SYNC pulses are being used or not.
For instance, if RT is selected such that the switching
frequency is 100kHz then the ISL6406 can be synchronized
to a switching frequency from 110kHz to 200kHz.
Overcurrent Protection
The overcurrent function protects the converter from a
shorted output by using the upper MOSFET on-resistance,
r_DS(ON), to monitor the current. This method enhances the
INTERNAL SOFT-START FUNCTION
DELAY INTERVAL
t0
t1
t2
TIME
FIGURE 5. OVERCURRENT PROTECTION RESPONSE
Figure 5 illustrates the protection feature responding to an
overcurrent event. At time t0, an overcurrent condition is
sensed across the upper MOSFET. As a result, the regulator
is quickly shutdown and the internal soft-start function begins
producing soft-start ramps. The delay interval seen by the
output is equivalent to three soft-start cycles. The fourth
internal soft-start cycle initiates a normal soft-start ramp of the
output, at time t1. The output is brought back into regulation
by time t2, as long as the overcurrent event has cleared. Had
the cause of the over current still been present after the delay
interval, the over current condition would be sensed and the
regulator would be shut down again for another delay interval
of three soft-start cycles. The resulting hiccup mode style of
protection would continue to repeat indefinitely.
The overcurrent function will trip at a peak inductor current
(I_peak) determined by Equation 3:
I_PEAK
=
(_{---I--O----C-----S---E----T----})_--(_{---R----O-----C----S----E----T----})
r_DS(ON)
(EQ. 3)
where I_OCSET is the internal OCSET current source (20µA
typical). The OC trip point varies mainly due to the MOSFET
r_DS(ON) variations. To avoid overcurrent tripping in the
9
FN9073.7
January 16, 2007