ISL6406_07 Datasheet, PDF (6/18 Pages) Intersil Corporation – Single Synchronous Buck Pulse-Width Modulation (PWM) Controller

ISL6406
Electrical Specifications Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application
Schematic. V_CC = +3.3V. Typical values are at T_A = +25°C. (Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Sync. Frequency Range (Note 6)
1.1 Times the natural switching
frequency.
110
-
770
kHz
Minimum Sync Pulse Width (Note 6)
-
40
100
ns
PWM Maximum Duty Cycle
-
96
-
%
GATE DRIVER OUTPUT (Note 6)
Upper Gate Source Current
Upper Gate Sink Current
V_BOOT - V_PHASE = 5V, V_UGATE = 4V
-
-1
-
A
-
1
-
A
Lower Gate Source Current
Lower Gate Sink Current
V_VCC = 3.3V, V_LGATE = 4V
-
-1
-
A
-
2
-
A
SOFT-START
Soft-Start Slew Rate
f = 300kHz, T_A = 0°C to +70°C
6.2
f = 300kHz, T_A = -40°C to +85°C
6.2
Internal Digital Circuit Clock Count
-
(Soft-start time varies with frequency)
6.7
6.7
2048
7.3
ms
7.6
ms
-
Clk Cycles
OVERCURRENT
OCSET Current Source
T_A = 0°C to +70°C
T_A = -40°C to +85°C
NOTES:
5. This is the V_CC current consumed when the device is active but not switching.
6. Guaranteed by design.
18
20
22
μA
16
20
23
μA
Typical Performance Curve
0.81
0.805
0.8
0.795
0.79
0.785
0.78
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80
TEMPERATURE (°C)
FIGURE 1. REFERENCE VOLTAGE vs TEMPERATURE
6
FN9073.7
January 16, 2007