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ISL6326B Datasheet, PDF (9/30 Pages) Intersil Corporation – 4-Phase PWM Controller with 8-Bit DAC Code Capable of Precision DCR Differential Current Sensing
ISL6326B
Functional Pin Description
VCC - Supplies the power necessary to operate the chip.
The controller starts to operate when the voltage on this pin
exceeds the rising POR threshold and shuts down when the
voltage on this pin drops below the falling POR threshold.
Connect this pin directly to a +5V supply.
GND - Bias and reference ground for the IC. The bottom
metal base of ISL6326B is the GND.
EN_PWR - This pin is a threshold-sensitive enable input for
the controller. Connecting the 12V supply to EN_PWR
through an appropriate resistor divider provides a means to
synchronize power-up of the controller and the MOSFET
driver ICs. When EN_PWR is driven above 0.875V, the
ISL6326B is active depending on status of EN_VTT, the
internal POR, and pending fault states. Driving EN_PWR
below 0.745V will clear all fault states and prime the
ISL6326B to soft-start when re-enabled.
EN_VTT - This pin is another threshold-sensitive enable
input for the controller. It’s typically connected to VTT output
of VTT voltage regulator in the computer mother board.
When EN_VTT is driven above 0.875V, the ISL6326B is
active depending on status of EN_PWR, the internal POR,
and pending fault states. Driving EN_VTT below 0.745V will
clear all fault states and prime the ISL6326B to soft-start
when re-enabled.
FS - Use this pin to set up the desired switching frequency. A
resistor, placed from FS to ground will set the switching
frequency. The relationship between the value of the resistor
and the switching frequency will be described by an
approximate equation.
SS - Use this pin to set up the desired start-up oscillator
frequency. A resistor, placed from SS to ground will set up
the soft-start ramp rate. The relationship between the value
of the resistor and the soft-start ramp up time will be
described by an approximate equation.
VID7, VID6, VID5, VID4, VID3, VID2, VID1 and VID0 -
These are the inputs to the internal DAC that generates the
reference voltage for output regulation. Connect these pins
either to open-drain outputs with or without external pull-up
resistors or to active-pull-up outputs. All VID pins have 40µA
internal pull-up current sources that diminish to zero as the
voltage rises above the logic-high level. These inputs can be
pulled up externally as high as VCC plus 0.3V.
VRSEL - use this pin to select internal VID code. When it is
connected to GND, the extended VR10 code is selected.
When it’s floated or pulled to high, VR11 code is selected.
This input can be pulled up as high as VCC plus 0.3V.
VDIFF, VSEN, and RGND - VSEN and RGND form the
precision differential remote-sense amplifier. This amplifier
converts the differential voltage of the remote output to a
single-ended voltage referenced to local ground. VDIFF is
the amplifier’s output and the input to the regulation and
protection circuitry. Connect VSEN and RGND to the sense
pins of the remote load.
FB and COMP - Inverting input and output of the error
amplifier respectively. FB can be connected to VDIFF
through a resistor. A properly chosen resistor between
VDIFF and FB can set the load line (droop), because the
sensed current will flow out of FB pin. The droop scale factor
is set by the ratio of the ISEN resistors and the inductor DCR
or the dedicated current sense resistor. COMP is tied back to
FB through an external R-C network to compensate the
regulator.
DAC and REF - The DAC pin is the output of the precision
internal DAC reference. The REF pin is the positive input of
the Error Amp. In typical applications, a 1kΩ, 1% resistor is
used between DAC and REF to generate a precision offset
voltage. This voltage is proportional to the offset current
determined by the offset resistor from OFS to ground or
VCC. A capacitor is used between REF and ground to
smooth the voltage transition during Dynamic VID™
operations.
PWM1, PWM2, PWM3, PWM4 - Pulse width modulation
outputs. Connect these pins to the PWM input pins of the
Intersil driver IC. The number of active channels is
determined by the state of PWM3 and PWM4. Tie PWM3 to
VCC to configure for 2-phase operation. Tie PWM4 to VCC
to configure for 3-phase operation.
ISEN1+, ISEN1-; ISEN2+, ISEN2-; ISEN3+, ISEN3-;
ISEN4+, ISEN4- - The ISEN+ and ISEN- pins are current
sense inputs to individual differential amplifiers. The sensed
current is used for channel current balancing, overcurrent
protection, and droop regulation. Inactive channels should
have their respective current sense inputs left open (for
example, open ISEN4+ and ISEN4- for 3-phase operation).
For DCR sensing, connect each ISEN- pin to the node
between the RC sense elements. Tie the ISEN+ pin to the
other end of the sense capacitor through a resistor, RISEN.
The voltage across the sense capacitor is proportional to the
inductor current. Therefore, the sense current is proportional
to the inductor current, and scaled by the DCR of the
inductor and RISEN.
To match the time delay of the internal circuit, a capacitor is
needed between each ISEN+ pin and GND, as described in
the Current Sensing section.
VR_RDY - VR_RDY indicates that soft-start has completed
and the output voltage is within the regulated range around
VID setting. It is an open-drain logic output. When OCP or
OVP occurs, VR_RDY will be pulled to low. It will also be
pulled low if the output voltage is below the under-voltage
threshold.
9
FN9286.0
April 21, 2006