ISL6326B Datasheet, PDF (13/30 Pages) Intersil Corporation – 4-Phase PWM Controller with 8-Bit DAC Code Capable of Precision DCR Differential Current Sensing

ISL6326B
Equation 7 shows the ratio of the channel current to the
sensed current I_SEN.
I_SEN
=
I_L
⋅
R_{-----S----E----N----S----E--}
R_ISEN
(EQ. 7)
IL
L
R_SENSE V_OUT
C_OUT
ISL6326B INTERNAL CIRCUIT
R_ISEN(n)
I_n
CURRENT
SENSE
ISEN-(n)
+
-
ISEN+(n)
C_T
ISEN
=
IL
-R----S-----E----N-----S----E---
RISEN
FIGURE 4. SENSE RESISTOR IN SERIES WITH INDUCTORS
The inductor DCR value will increase as the temperature
increases. Therefore the sensed current will increase as the
temperature of the current sense element increases. In order
to compensate the temperature effect on the sensed current
signal, a Positive Temperature Coefficient (PTC) resistor can
be selected for the sense resistor R_ISEN, or the integrated
temperature compensation function of ISL6326B should be
utilized. The integrated temperature compensation function
is described in the Temperature Compensation section.
Channel-Current Balance
The sensed current I_n from each active channel are summed
together and divided by the number of active channels. The
resulting average current I_AVG provides a measure of the
total load current. Channel current balance is achieved by
comparing the sensed current of each channel to the
average current to make an appropriate adjustment to the
PWM duty cycle of each channel with Intersil’s patented
current-balance method.
Channel current balance is essential in achieving the
thermal advantage of multiphase operation. With good
current balance, the power loss is equally dissipated over
multiple devices and a greater area.
Voltage Regulation
The compensation network shown in Figure 5 assures that
the steady-state error in the output voltage is limited only to
the error in the reference voltage (output of the DAC) and
offset errors in the OFS current source, remote-sense and
error amplifiers. Intersil specifies the guaranteed tolerance of
the ISL6326B to include the combined tolerances of each of
these elements.
The sensed average current I_AVG is tied to FB internally.
This current will develop voltage drop across the resistor
between FB and VDIFF pins for droop control. ISL6326B
can not be used for non-droop applications.
The output of the error amplifier, V_COMP, is compared to
sawtooth waveforms to generate the PWM signals. The
PWM signals control the timing of the Intersil MOSFET
drivers and regulate the converter output to the specified
reference voltage. The internal and external circuitry which
control voltage regulation is illustrated in Figure 5.
EXTERNAL CIRCUIT
R_C C_{C COMP}
ISL6326B INTERNAL CIRCUIT
R_REF
C_REF
DAC
REF
R_FB
+
V_DROOP
-
FB
VDIFF
I_AVG
+
-
V_COMP
ERROR AMPLIFIER
V_OUT+
VSEN
+
V_OUT-
RGND
-
DIFFERENTIAL
REMOTE-SENSE
AMPLIFIER
FIGURE 5. OUTPUT VOLTAGE AND LOAD-LINE
REGULATION WITH OFFSET ADJUSTMENT
The ISL6326B incorporates an internal differential remote-
sense amplifier in the feedback path. The amplifier removes
the voltage error encountered when measuring the output
voltage relative to the local controller ground reference point
resulting in a more accurate means of sensing output
voltage. Connect the microprocessor sense pins to the non-
inverting input, VSEN, and inverting input, RGND, of the
remote-sense amplifier. The remote-sense output, V_DIFF, is
connected to the inverting input of the error amplifier through
an external resistor.
A digital-to-analog converter (DAC) generates a reference
voltage based on the state of logic signals at pins VID7
through VID0. The DAC decodes the eight 6-bit logic signal
(VID) into one of the discrete voltages shown in Table 1.
Each VID input offers a 45µA pull-up to an internal 2.5V
source for use with open-drain outputs. The pull-up current
diminishes to zero above the logic threshold to protect
voltage-sensitive output devices. External pull-up resistors
can augment the pull-up current sources if case leakage into
the driving device is greater than 45µA.
13
FN9286.0
April 21, 2006