ISL6326B Datasheet, PDF (24/30 Pages) Intersil Corporation – 4-Phase PWM Controller with 8-Bit DAC Code Capable of Precision DCR Differential Current Sensing

ISL6326B
10. Record the output voltage as V1 immediately after the
output voltage is stable with the full load. Record the
output voltage as V2 after the VR reaches the thermal
steady state.
11. If the output voltage increases over 2mV as the
temperature increases, i.e. V2-V1 > 2mV, reduce N and
redesign R_TC2; if the output voltage decreases over 2mV
as the temperature increases, i.e. V1-V2 > 2mV, increase
N and redesign R_TC2.
External Temperature Compensation
By pulling the TCOMP pin to GND, the integrated
temperature compensation function is disabled. And one
external temperature compensation network, shown in
Figure 15, can be used to cancel the temperature impact on
the droop (i.e., load line).
COMP
ISL6326B
Internal
circuit
FB
o_C
ISEN
VDIFF
FIGURE 15. EXTERNAL TEMPERATURE COMPENSATION
The sensed current will flow out of the FB pin and develop a
droop voltage across the resistor equivalent (R_FB) between
the FB and VDIFF pins. If R_FB resistance reduces as the
temperature increases, the temperature impact on the droop
can be compensated. An NTC resistor can be placed close
to the power stage and used to form R_FB. Due to the
non-linear temperature characteristics of the NTC, a resistor
network is needed to make the equivalent resistance
between the FB and VDIFF pins reverse proportional to the
temperature.
The external temperature compensation network can only
compensate the temperature impact on the droop, while it
has no impact to the sensed current inside ISL6326B.
Therefore, this network cannot compensate for the
temperature impact on the overcurrent protection function.
General Design Guide
This design guide is intended to provide a high-level
explanation of the steps necessary to create a multiphase
power converter. It is assumed that the reader is familiar with
many of the basic skills and techniques referenced below. In
addition to this guide, Intersil provides complete reference
designs that include schematics, bills of materials, and
example board layouts for all common microprocessor
applications.
Power Stages
The first step in designing a multiphase converter is to
determine the number of phases. This determination
depends heavily on the cost analysis which in turn depends
on system constraints that differ from one design to the next.
Principally, the designer will be concerned with whether
components can be mounted on both sides of the circuit
board; whether through-hole components are permitted; and
the total board space available for power-supply circuitry.
Generally speaking, the most economical solutions are
those in which each phase handles between 15 and 20A. All
surface-mount designs will tend toward the lower end of this
current range. If through-hole MOSFETs and inductors can
be used, higher per-phase currents are possible. In cases
where board space is the limiting constraint, current can be
pushed as high as 40A per phase, but these designs require
heat sinks and forced air to cool the MOSFETs, inductors
and heat-dissipating surfaces.
MOSFETs
The choice of MOSFETs depends on the current each
MOSFET will be required to conduct; the switching
frequency; the capability of the MOSFETs to dissipate heat;
and the availability and nature of heat sinking and air flow.
LOWER MOSFET POWER CALCULATION
The calculation for heat dissipated in the lower MOSFET is
simple, since virtually all of the heat loss in the lower
MOSFET is due to current conducted through the channel
resistance (R_DS(ON)). In Equation 24, I_M is the maximum
continuous output current; I_PP is the peak-to-peak inductor
current (see Equation 1); d is the duty cycle (V_OUT/V_IN); and
L is the per-channel inductance.
P_{LOW, 1}
=
r_DS(ON)
⎛
⎜
⎝
-I-^M---⎟⎞
N⎠
2
(
1
–
d)
+
-I-^L---^,---^2P----^P----⁽--1-----^–-----d----⁾
12
(EQ. 24)
An additional term can be added to the lower-MOSFET loss
equation to account for additional loss accrued during the
dead time when inductor current is flowing through the
lower-MOSFET body diode. This term is dependent on the
diode forward voltage at I_M, V_D(ON); the switching
frequency, f_S; and the length of dead times, t_d1 and t_d2, at
the beginning and the end of the lower-MOSFET conduction
interval respectively.
P_{LOW, 2}
=
V_D(ON) f_S
⎛
⎝
I--_M---
N
+
I--_{P--2--P--⎠⎞}
t_d1
+
⎛
⎜
-I-^M---
⎝N
–
I--_{P----P--⎟⎞}
2⎠
t_d2
(EQ. 25)
Thus the total maximum power dissipated in each lower
MOSFET is approximated by the summation of P_LOW,1 and
P_LOW,2.
Upper MOSFET Power Calculation
In addition to R_DS(ON) losses, a large portion of the upper-
MOSFET losses are due to currents conducted across the
input voltage (V_IN) during switching. Since a substantially
24
FN9286.0
April 21, 2006