X9119 Datasheet, PDF (8/18 Pages) Xilinx, Inc – Single Digitally-Controlled (XDCP ™ ) Potentiometer

X9119
Table 4. Wiper Control Register, WCR (10-bit), WCR9–WCR0: Used to store the current wiper position (Volatile, V)
WCR9 WCR8 WCR7 WCR6 WCR5 WCR4 WCR3 WCR2 WCR1 WCR0
V
V
V
V
V
V
V
V
V
V
(MSB)
(LSB)
Table 5. Data Register, DR (10-bit), Bit 9–Bit 0: Used to store wiper positions or data (Non-Volatile, NV)
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
NV
NV
NV
NV
NV
NV
NV
NV
NV
NV
MSB
LSB
Four of the six instructions are four bytes in length.
These instructions are:
– Read Wiper Counter Register – read the current
wiper position of the selected potentiometer,
– Write Wiper Counter Register – change current
wiper position of the selected potentiometer,
– Read Data Register – read the contents of the
selected Data Register;
– Write Data Register – write a new value to the
selected Data Register.
The basic sequence of the four byte instructions is
illustrated in Figure 3. These four-byte instructions
exchange data between the WCR and one of the Data
Registers. A transfer from a data register to a WCR is
essentially a write to a static RAM, with the static RAM
controlling the wiper position. The response of the
wiper to this action will be delayed by t_WRL. A transfer
from the WCR (current wiper position), to a data
register is a write to nonvolatile memory and takes a
minimum of t_WR to complete. The transfer can occur
between one of the four potentiometers and one of its
associated registers.
Two instructions (see Figure 4) require a two-byte
sequence to complete. These instructions transfer
data between the host and the X9119; either between
the host and one of the data registers or directly
between the host and the Wiper Counter Register.
These instructions are:
– XFR Data Register to Wiper Counter Register –
This transfers the contents of one specified Data
Register to the Wiper Counter Register.
– XFR Wiper Counter Register to Data Register –
This transfers the contents of the Wiper Counter
Register to the specified Data Register.
See Instruction format for more details.
POWER UP AND DOWN REQUIREMENTS
There are no restrictions on the power-up condition of
Vcc and the voltages applied to the potentiometer pins
provided that the Vcc is always more positive than or
equal to the voltages at R_H, R_L, and R_W, i.e. V_CC ≥
R_H, R_L, R_W. There are no restrictions on the power-
down condition. However, the datasheet parameters
for the DCP do not apply until 1milisecond after V_CC
reaches its final value.
Figure 3. Two-Byte Instruction Sequence
SCL
SDA
01 0 1
0
00
S ID3 ID2 ID1 ID0 A2 A1 A0 R/W A I2 I0 I1 0
T
C
A
R
Device ID
T
Internal
Address
K _Instruction
Opcode
RB RA 0
Register
Address
AS
CT
KO
P
8
FN8162.2
September 15, 2005