ISL6263A Datasheet, PDF (8/19 Pages) Intersil Corporation – 5-Bit VID Single-Phase Voltage Regulator with Power Monitor for IMVP-6+ Santa Rosa GPU Core

ISL6263A
Electrical Specifications
These specifications apply for T_A = -40°C to +100°C, unless otherwise stated. All typical specifications
T_A = +25°C, V_DD = 5V, PV_CC = 5V. Boldface limits apply over the operating temperature range,
-40°C to +100°C. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
MAX
(Note 6)
TYP
(Note 6) UNITS
LGATE Source Resistance (Note 7)
LGATE Source Current (Note 7)
LGATE Sink Resistance (Note 7)
LGATE Sink Current (Note 7)
UGATE Pull-Down Resistor
UGATE Turn-On Propagation Delay
LGATE Turn-On Propagation Delay
BOOTSTRAP DIODE
R_LGSRC
I_LGSRC
R_LGSNK
I_LGSNK
R_PD
t_PDRU
t_PDRL
500mA Source Current
V_{LGATE_PGND} = 2.5V
500mA Sink Current
V_{LGATE_PGND} = 2.5V
PV_CC = 5V, UGATE open
PV_CC = 5V, LGATE open
1.0
1.5
Ω
2.0
A
0.5
0.9
Ω
4.0
A
1.1
kΩ
30
ns
15
ns
Forward Voltage
V_F
Reverse Leakage
I_R
POWER GOOD and PROTECTION MONITOR
PV_CC = 5V, I_F = 10mA
V_R = 16V
0.56
0.69
0.795
V
5.0
µA
PGOOD Low Voltage
PGOOD Leakage Current
Overvoltage Threshold (VO-VSOFT)
Severe Overvoltage Threshold
V_PGOOD
I_PGOOD
V_OVP
V_OVPS
I_PGOOD = 4mA
V_PGOOD = 3.3V
V_O rising above V_SOFT >1ms
V_O rising above 1.55V reference
>0.5µs
-1.0
155
1.525
0.11
195
1.550
0.40
V
1.0
µA
235
mV
1.575
V
OCSET Reference Current
I_OCSET R_RBIAS = 150kΩ
9.9
OCSET Voltage Threshold Offset
V_{OCSET_OFS} V_DROOP rising above V_OCSET
-3
>120µs
10.1
10.3
µA
3
mV
Undervoltage Threshold (VSOFT-VO)
CONTROL INPUTS
V_UVF
V_O falling below V_SOFT for >1ms
-360
-300
-240
mV
VR_ON Input Low
V_{VR_ONL}
1
V
VR_ON Input High
V_{VR_ONH}
2.3
V
AF_EN Input Low
V_{AF_ENL}
1
V
AF_EN Input High
V_{AF_ENH}
2.3
V
VR_ON Leakage
I_{VR_ONL} V_{VR_ON} = 0V
-1.0
0
µA
I_{VR_ONH} V_{VR_ON} = 3.3V
0
1.0
µA
AF_EN Leakage
I_{AF_ENL} V_{AF_EN} = 0V
-1.0
0
µA
I_{AF_ENH} V_{AF_EN} = 3.3V
0.45
1.0
µA
VID<4:0> Input Low
V_VIDL
0.4
V
VID<4:0> Input High
V_VIDH
0.7
V
FDE Input Low
V_FDEL
0.3
V
FDE Input High
V_FDEH
0.7
V
VID<4:0> Leakage
I_VIDL
V_VID = 0V
-1.0
0
µA
I_VIDH
V_VID = 1.0V
0.45
1.0
µA
FDE Leakage
I_FDEL
V_FDE = 0V
-1.0
0
µA
I_FDEH
V_FDE = 1.0V
0.45
1.0
µA
NOTES:
6. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
7. Limits established by characterization and are not production tested.
8
FN9284.3
July 8, 2010