ISL6263A Datasheet, PDF (19/19 Pages) Intersil Corporation – 5-Bit VID Single-Phase Voltage Regulator with Power Monitor for IMVP-6+ Santa Rosa GPU Core

Package Outline Drawing
L32.5x5
32 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
Rev 2, 02/07
ISL6263A
6
PIN 1
INDEX AREA
5.00
A
B
(4X) 0.15
TOP VIEW
25
24
4X 3.5
28X 0.50
6
32
PIN #1 INDEX AREA
1
3 .10 ± 0 . 1
17
8
16
32X 0.40 ± 0.1
9
0.10 M C A B
+ 0.07
4 32X 0.23 _{- 0.05}
BOTTOM VIEW
( 4. 80 TYP )
( 3. 10 )
( 28X 0 . 5 )
0 . 90 ± 0.
SIDE VIEW
SEE DETAIL "X"
0.10 C
C
BASE PLANE
SEATING PLANE
0.08 C
(32X 0 . 23 )
( 32X 0 . 60)
TYPICAL RECOMMENDED LAND PATTERN
C
0 . 2 REF
5
0 . 00 MIN.
0 . 05 MAX.
DETAIL "X"
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3. Unless otherwise specified, tolerance : Decimal ± 0.0
4. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
5. Tiebar shown (if present) is a non-functional feature.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 indentifier may be
either a mold or mark feature.
19
FN9284.3
July 8, 2010