ISL6263A Datasheet, PDF (12/19 Pages) Intersil Corporation – 5-Bit VID Single-Phase Voltage Regulator with Power Monitor for IMVP-6+ Santa Rosa GPU Core

ISL6263A
+
Σ
+
VDIFF
VDD
−
OCP
+
+
−
10µA
OCSET
+
DROOP
−
VSUM
DFB
DROOP
VO
VSEN
+
RTN
−
R_OCSET
PHASE
R_S
C_FILTER1
R_FILTER1
R_FILTER2
C_FILTER2
C_FILTER3
L_OUT
DCR
C_OUT
ESR
TO
V_{CC_SNS PROCESSOR}
SOCKET
V_{SS_SNS}
KELVIN
CONNECTIONS
FIGURE 5. SIMPLIFIED VOLTAGE DROOP CIRCUIT WITH GPU SOCKET KELVIN SENSING AND INDUCTOR DCR CURRENT SENSING
Smooth mode transitions are facilitated by the R³ modulator
which correctly maintains the internally synthesized ripple
current information throughout mode transitions.
Power Monitor
The ISL6263A features an IMVP-6+ compliant power
monitor output. The voltage between the PMON and VSS
pins is proportional to the product of the regulated output
voltage and the output inductor current. The output voltage is
measured between the VSEN and VSS pins. The output
inductor current is proportional to the voltage between the
DROOP and VO pins. The PMON pin has source and sink
capability for close tracking of transient power events. The
power monitor output is expressed as Equation 1:
V_PMON = V_SEN ⋅ (V_DROOP – V_O) ⋅ (17.5)
(EQ. 1)
Protection
The ISL6263A provides overcurrent protection (OCP),
overvoltage protection (OVP), and undervoltage protection
(UVP) as shown in Table 3.
Overcurrent protection is tied to the voltage droop, which is
determined by the resistors selected in “Static and Dynamic
Droop using Discrete Resistor Sensing” on page 17. After
the load line is set, the OCSET resistor can be selected. The
OCP threshold detector is checked every 15µs and will
increment a counter if the OCP threshold is exceeded,
conversely the counter will be decremented if the load
current is below the OCP threshold. The counter will latch an
OCP fault when the counter reaches eight. The fastest OCP
response for overcurrent levels that are no more than 2.5x
the OCP threshold is 120µs, which is eight counts at 15µs
each. The ISL6263A protects against hard shorts by latching
an OCP fault within 2µs for overcurrent levels exceeding
2.5x the OCP threshold. The value of R_OCSET is calculated
as Equation 2:
R_OCSET
=
-^I-^O-----^C-----^â‹---^R-----^d---^r--^o----^o---^p-
10.1 μ A
(EQ. 2)
For example: The desired overcurrent trip level, I_OC, is 30A,
R_droop load-line is 8mΩ, Equation 2 gives R_OCSET = 24kΩ.
Undervoltage protection is independent of the overcurrent
protection. If the output voltage measured on the VO pin is
less than +300mV below the voltage on the SOFT pin for
longer than 1ms, the controller will latch a UVP fault. If the
output voltage measured on the VO pin is greater than
195mV above the voltage on the SOFT pin for longer than
1ms, the controller will latch an OVP fault. Keep in mind that
V_SOFT will equal the voltage level commanded by the VID
states only after the soft-start capacitor C_SOFT has slewed to
the VID DAC output voltage. The UVP and OVP detection
circuits act on static and dynamic V_SOFT voltage.
When an OCP, OVP, or UVP fault has been latched, PGOOD
becomes a low impedance and the gate driver outputs UGATE
and LGATE are pulled low. The energy stored in the inductor is
dissipated as current flows through the low-side MOSFET body
diode. The controller will remain latched in the fault state until
the VR_ON pin has been pulled below the falling VR_ON
threshold voltage V_{VR_ONL} or until VDD has gone below the
falling POR threshold voltage ^V_{VDD_THF}.
12
FN9284.3
July 8, 2010