ISL6263A Datasheet, PDF (15/19 Pages) Intersil Corporation – 5-Bit VID Single-Phase Voltage Regulator with Power Monitor for IMVP-6+ Santa Rosa GPU Core

ISL6263A
The NTC network resistor value is dependent on
temperature and is given by Equation 9:
R_N(T)
=
(_---R_{----N-----T---C------+-----}R_{----N----T----C----S----})_---⋅_----R_{----N----T----C----P--}
R_NTC + R_NTCS + R_NTCP
(EQ. 9)
G₁, the gain of V_N to V_DCR, is also dependent on the
temperature of the NTC thermistor shown in Equation 10:
G₁(T)
=
--------^R----^N-----⁽--^T----⁾--------
R_N(T) + R_S
(EQ. 10)
The inductor DCR is a function of temperature and is
approximately given by Equation 11:
DCR(T) = DCR_25°C ⋅ (1 + 0.00393 ⋅ (T – 25°C))
(EQ. 11)
The droop amplifier output voltage divided by the total load
current is given by Equation 12:
R_droop = G₁(T) ⋅ DCR_25°C ⋅ (1 + 0.00393 ⋅ (T – 25°C)) ⋅ k_droopamp
(EQ. 12)
R_droop is the actual load line slope, and 0.00393 is the
temperature coefficient of the copper. To make R_droop
independent of the inductor temperature, it is desired to
have:
G₁(T) ⋅ (1 + 0.00393 ⋅ (T – 25°C)) ≅ G_{1t arget}
(EQ. 13)
where G_1target is the desired ratio of V_n / V_DCR. Therefore, the
temperature characteristics G₁ is described by Equation 14:
G₁(T)
=
------------------------^G-----¹---^t--^a---^r--^g---^e----^t-----------------------
(1 + 0.00393 ⋅ (T – 25°C))
(EQ. 14)
It is recommended to begin your droop design using the
R_NTC, R_NTCS, and R_NTCP component values of the
evaluation board available from Intersil.
The gain of the droop amplifier circuit is shown in Equation 15:
k_droopamp
=
1
+
R_{-----D----R----P----2--}
R_DRP1
(EQ. 15)
After determining R_S and R_NTCEQ networks, use
Equation 16 to calculate the droop resistances R_DRP1 and
R_DRP2.
R_DRP2
=
⎛
⎜
⎝
⎛
⎜
⎝
D^-----C^-----R^--R----⋅^-d--G^-r---o-₁^--o-₍^--p2---₅^----_°^--_C^----_{)⎠⎟⎞}
⎞
– 1⎟
⎠
⋅ R_DRP1
(EQ. 16)
R_droop is 8mΩ per Intel IMVP-6+ specification and R_DRP1 is
typically 1kΩ.
The effectiveness of the R_NTCEQ network is sensitive to the
coupling coefficient between the NTC thermistor and the
inductor. The NTC thermistor should be placed in the closet
proximity of the inductor.
To see whether the NTC network successfully compensates
the DCR change over-temperature, one can apply full load
current and wait for the thermal steady state and see how
much the output voltage deviates from the initial voltage
reading. A good compensation can limit the drift to less than
2mV. If the output voltage is decreasing when the temperature
increases, that ratio between the NTC thermistor value and
the rest of the resistor divider network has to be increased.
Following the evaluation board value and layout of NTC
placement will minimize the engineering time.
VDD
−
OCP
+
+
−
10µA
OCSET
+
DROOP
−
VSUM
DFB
DROOP
VO
R_OCSET
R_S
V_DCR
FIGURE 8. EQUIVALENT MODEL FOR DROOP CIRCUIT USING INDUCTOR DCR CURRENT SENSING
15
FN9284.3
July 8, 2010