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ISL26132_14 Datasheet, PDF (7/23 Pages) Intersil Corporation – Low-Noise 24-bit Delta Sigma ADC
ISL26132, ISL26134
Noise Performance
The ISL26132 and ISL26134 provide excellent noise
performance. The noise performance on each of the gain
settings of the PGA at the selected word rates is shown in
Tables 5 and 6.
Resolution in bits decreases by 1-bit if the ADC is operated as a
single-ended input device. Noise measurements are
input-referred, taken with bipolar inputs under the specified
operating conditions, with fCLK = 4.9152MHz.
TABLE 5. AVDD = 5V, VREF = 5V, DATA RATE = 10Sps
RMS NOISE
GAIN
(nV)
PEAK-TO-PEAK NOISE
(nV) (Note 10)
NOISE-FREE BITS
(Note 11)
1
243
1604
21.6
2
148
977
21.3
64
11.3
75
20
128
10.6
70
19
TABLE 6. AVDD = 5V, VREF = 5V, DATA RATE = 80Sps
GAIN
RMS NOISE PEAK-TO-PEAK NOISE NOISE-FREE BITS
(nV)
(nV) (Note 10)
(Note 11)
1
565
3730
20.4
2
285
1880
20.3
64
29.5
194.8
18.6
128
28.2
186.1
17.6
NOTES:
10. The peak-to-peak noise number is 6.6 times the rms value. This
encompasses 99.99% of the noise excursions that may occur. This
value best represents the worst case noise that could occur in the
output conversion words from the converter.
11. Noise-Free Bits is defined as: Noise-Free Bits = ln(FSR/peak-to-peak
noise)/ln(2) where FSR is the full scale range of the converter,
VREF/Gain.
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7
FN6954.3
November 20, 2014