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ISL26132_14 Datasheet, PDF (19/23 Pages) Intersil Corporation – Low-Noise 24-bit Delta Sigma ADC
ISL26132, ISL26134
Application Information
Power-up Sequence – Initialization and
Configuration
The sequence to properly power-up and initialize the device are
as follows. For details on individual functions, refer to their
descriptions.
1. AVDD, DVDD ramp to specified levels
2. Apply External Clock
3. Pull PDWN High to initiate Reset
4. Device begins conversion
5. SDO/RDY goes low at end of first conversion
OPTIONAL ACTIONS
• Perform Offset Calibration
• Place device in Standby
• Return device from Standby
• Read on-chip Temperature (applicable to ISL26132 only)
Application Examples
WEIGH SCALE SYSTEM
Figure 38 illustrates the ISL26132 connected to a load cell. The
A/D converter is configured for a gain of 128x and a sample rate
of 10Sps. If a load cell with 2mV/V sensitivity is used, the full
scale output from the load cell will be 10mV. On a gain of 128x
and sample rate of 10Sps, the converter noise is 67nVP-P. The
converter will achieve 10mV/67nVP-P = 149,250 noise free
counts across its 10mV input signal. This equates to 14,925
counts per millivolt of input signal. If five output words are
averaged together this can be improved by √5 to yield √5*14925
counts = 33,370 counts per millivolt of input signal with an
effective update rate of 2 readings per second.
5V
3V
0.1µF
18
1
-
+
AVDD
16 VREF+
9 CAP
0.1µF
10 CAP
DVDD
GAIN1 20
VDD
GAIN0
SDO/RDY
19
24
GAIN = 128
SCLK 23
MICRO
CONTROLLER
ISL26132 PDWN 22
11 AIN+1
XTALOUT 4
12
14
13
AIN-1
AIN+2
AIN-2
XTALIN/CLOCK
SPEED
A0
3
21
8
15 VREF-
TEMP 7
AGND
DGND
GND
17
2, 5, 6
FIGURE 38. WEIGH SCALE APPLICATION
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FN6954.3
November 20, 2014