ISL26132_14 Datasheet, PDF (21/23 Pages) Intersil Corporation – Low-Noise 24-bit Delta Sigma ADC

ISL26132, ISL26134
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make
sure you have the latest Rev.
DATE
REVISION
CHANGE
November 20, 2014
FN6954.3
Datasheet updated with minor text and graphic changes.
November 12, 2012
FN6954.2
Changed in Abs Max Rating on page 5 Latchup JESD from 78B to 78C
Electrical Spec Table Gain Drift on page 5 changed the following:
Added Gain = 64 and Typical value of 3.5
Changed Gain = 128 Typical value from 7 to 3.5
Table 5 on page 7 changed the following:
Gain 64 RMS changed from 10.8 to 11.3
Peak to Peak from 71 to 75
NFB from 20.1 to 20
Gain 128 RMS changed from 10.2 to 10.6
Peak to Peak from 67 to 70
NFB from 19.1 to 19
September 08, 2011
August 22, 2011
FN6954.1
FN6954.0
Table 6 on page 7 changed the following:
Gain 64 RMS changed from 28.3 to 29.5
Peak to Peak from 187 to 194.8
NFB from 18.7 to 18.6
Gain 128 RMS changed from 27 to 28.2
Peak to Peak from 178 to 186.1
NFB from 17.7 to 17.6
Power Supply Requirements on page 6 - AIDD - Analog Supply Current - Normal Mode, AVDD = 5,
Gain = 1,2 changed TYP and MAX from “6, 7.3” to “7, 8.5”
Power Dissipation, Total Normal Mode, AVDD = 5, Gain = 1, 2 changed from “43.3” to “49.6” mW (Max)
Initial Release.
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FN6954.3
November 20, 2014