ISL12022MIBZ-T7A Datasheet, PDF (7/31 Pages) Intersil Corporation – Low Power RTC with Battery Backed SRAM, Integrated ±5ppm Temperature Compensation and Auto Daylight Saving

ISL12022M
I²C Interface Specifications Test Conditions: V_DD = +2.7 to +5.5V, Temperature = -40°C to +85°C, unless otherwise specified.
Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 7)
TYP
(Note 8)
MAX
(Note 7)
UNITS
NOTES
t_SU:STA
t_HD:STA
t_SU:DAT
t_HD:DAT
t_SU:STO
t_HD:STO
t_DH
t_R
t_F
Cb
START Condition Setup Time
START Condition Hold Time
Input Data Setup Time
Input Data Hold Time
STOP Condition Setup Time
STOP Condition Hold Time
Output Data Hold Time
SDA and SCL Rise Time
SDA and SCL Fall Time
Capacitive Loading of SDA or SCL
SCL rising edge to SDA falling
600
edge. Both crossing 70% of
V_DD.
From SDA falling edge
600
crossing 30% of V_DD to SCL
falling edge crossing 70% of
V_DD.
From SDA exiting the 30% to
100
70% of V_DD window, to SCL
rising edge crossing 30% of
V_DD.
From SCL falling edge
20
crossing 30% of V_DD to SDA
entering the 30% to 70% of
V_DD window.
From SCL rising edge
600
crossing 70% of V_DD, to SDA
rising edge crossing 30% of
V_DD.
From SDA rising edge to SCL
600
falling edge. Both crossing
70% of V_DD.
From SCL falling edge
0
crossing 30% of V_DD, until
SDA enters the 30% to 70%
of V_DD window.
From 30% to 70% of V_DD. 20 + 0.1 x Cb
From 70% to 30% of V_DD. 20 + 0.1 x Cb
Total on-chip and off-chip
10
ns
ns
ns
900
ns
ns
ns
ns
300
ns
13, 14
300
ns
13, 14
400
pF
13, 14
R_PU
SDA and SCL Bus Pull-up Resistor Maximum is determined by
1
Off-chip
t_R and t_F.
For Cb = 400pF, max is about
2kΩ~2.5kΩ.
For Cb = 40pF, max is about
15kΩ~20kΩ
kΩ
13, 14
NOTES:
7. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
8. Specified at +25°C.
9. Temperature Conversion is inactive below V_BAT = 2.7V. Device operation is not guaranteed at V_BAT <1.8V.
10. IRQ/F_OUT inactive.
11. V_DD > V_BAT +V_BATHYS
12. In order to ensure proper timekeeping, the V_{DD SR-} specification must be followed.
13. Limits should be considered typical and are not production tested.
14. These are I²C specific parameters and are not tested, however, they are used to set conditions for testing devices to validate specification.
15. Minimum V_DD and/or V_BAT of 1V to sustain the SRAM. The value is based on characterization and it is not tested.
16. To avoid EEPROM recall issues, it is advised to use this minimum power up slew rate. Not tested, shown as typical only.
17. Defined as the deviation from a target oscillator frequency of 32,768.0Hz at room temperature.
18. Defined as the deviation from the room temperature measured 1Hz frequency, V_DD = 3.3V, at T_A = -40°C to +85°C.
19. Defined as the deviation at room temperature from the measured 1Hz frequency (or equivalent) at V_DD = 3.3, over the range of V_DD = 2.7V to
V_DD = 5.5V.
7
FN6668.9
June 20, 2012