ISL12022MIBZ-T7A Datasheet, PDF (2/31 Pages) Intersil Corporation – Low Power RTC with Battery Backed SRAM, Integrated ±5ppm Temperature Compensation and Auto Daylight Saving

Block Diagram
ISL12022M
SDA
SCL
SDA
BUFFER
SCL
BUFFER
I²C
INTERFACE
CONTROL
LOGIC
REGISTERS
CRYSTAL
OSCILLATOR
RTC
DIVIDER
V_DD
V_BAT
V_TRIP
+-
GND
POR
FREQUENCY
OUT
SWITCH
INTERNAL
SUPPLY
TEMPERATURE
SENSOR
FREQUENCY
CONTROL
ALARM
SECONDS
MINUTES
HOURS
DAY OF WEEK
DATE
MONTH
YEAR
CONTROL
REGISTERS
USER
SRAM
IRQ/F_OUT
Pin Configuration
NC
NC
NC
NC
NC
GND
V_BAT
GND
NC
NC
ISL12022M
(20 LD SOIC)
TOP VIEW
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
NC
NC
NC
NC
NC
GND
V_DD
IRQ/F_OUT
SCL
SDA
Pin Descriptions
PIN NUMBER
1, 2, 3, 4, 5, 9,
10, 16, 17, 18,
19, 20
7
11
SYMBOL
NC
DESCRIPTION
No Connection. Do not connect to a signal or supply voltage.
V_BAT
SDA
Backup Supply. This input provides a backup supply voltage to the device. V_BAT supplies power to the device in the event
that the V_DD supply fails. This pin can be connected to a battery, a supercapacitor or tied to ground if not used. See the
Battery Monitor parameter in “DC Operating Characteristics RTC” on page 5. This pin should be tied to ground if not used.
Serial Data. SDA is a bi-directional pin used to transfer data into and out of the device. It has an open drain output and
may be OR’ed with other open drain or open collector outputs. The input buffer is always active (not gated) in normal
mode.
An open drain output requires the use of a pull-up resistor. The output circuitry controls the fall time of the output signal
with the use of a slope controlled pull-down. The circuit is designed for 400kHz I²C interface speeds. It is disabled when
the backup power supply on the V_BAT pin is activated.
2
FN6668.9
June 20, 2012