ISL12022MIBZ-T7A Datasheet, PDF (18/31 Pages) Intersil Corporation – Low Power RTC with Battery Backed SRAM, Integrated ±5ppm Temperature Compensation and Auto Daylight Saving

ISL12022M
TABLE 12. IATRO TRIMMING RANGE (Continued)
TRIMMING
IATR05 IATR04 IATR03 IATR02 IATR01 IATR00 RANGE
0
1
0
0
1
1
+13
0
1
0
1
0
0
+12
0
1
0
1
0
1
+11
0
1
0
1
1
0
+10
0
1
0
1
1
1
+9
0
1
1
0
0
0
+8
0
1
1
0
0
1
+7
0
1
1
0
1
0
+6
0
1
1
0
1
1
+5
0
1
1
1
0
0
+4
0
1
1
1
0
1
+3
0
1
1
1
1
0
+2
0
1
1
1
1
1
+1
1
0
0
0
0
0
0
1
0
0
0
0
1
-1
1
0
0
0
1
0
-2
1
0
0
0
1
1
-3
1
0
0
1
0
0
-4
1
0
0
1
0
1
-5
1
0
0
1
1
0
-6
1
0
0
1
1
1
-7
1
0
1
0
0
0
-8
1
0
1
0
0
1
-9
1
0
1
0
1
0
-10
1
0
1
0
1
1
-11
1
0
1
1
0
0
-12
1
0
1
1
0
1
-13
1
0
1
1
1
0
-14
1
0
1
1
1
1
-15
1
1
0
0
0
0
-16
1
1
0
0
0
1
-17
1
1
0
0
1
0
-18
1
1
0
0
1
1
-19
1
1
0
1
0
0
-20
1
1
0
1
0
1
-21
1
1
0
1
1
0
-22
1
1
0
1
1
1
-23
1
1
1
0
0
0
-24
1
1
1
0
0
1
-25
1
1
1
0
1
0
-26
TABLE 12. IATRO TRIMMING RANGE (Continued)
TRIMMING
IATR05 IATR04 IATR03 IATR02 IATR01 IATR00 RANGE
1
1
1
0
1
1
-27
1
1
1
1
0
0
-28
1
1
1
1
0
1
-29
1
1
1
1
1
0
-30
1
1
1
1
1
1
-31
ALPHA Register (ALPHA)
TABLE 13. ALPHA REGISTER
ADDR 7 6
5
4
3
2
1
0
0Ch D ALPHA6 ALPHA5 ALPHA4 ALPHA3 ALPHA2 ALPHA1 ALPHA0
The ALPHA variable is 8 bits and is defined as the temperature
coefficient of crystal from -40°C to T0, or the ALPHA Cold (there is
an Alpha Hot register that must be programmed as well). It is
normally given in units of ppm/°C², with a typical value of -0.034.
The ISL12022M device uses a scaled version of the absolute value
of this coefficient in order to get an integer value. Therefore,
ALPHA <7:0> is defined as the (|Actual ALPHA Value| x 2048) and
converted to binary. For example, a crystal with Alpha of
-0.034ppm/°C² is first scaled (|2048*(-0.034)| = 70d) and then
converted to a binary number of 01000110b.
The practical range of Actual ALPHA values is from -0.020 to -0.060.
The ISL12022M has a preset ALPHA value corresponding to the
crystal in the module. This value is recalled on initial power-up and
is preset in device production. It is READ ONLY and cannot be
overwritten by the user.
BETA Register (BETA)
TABLE 14.
ADDR 7 6 5
4
3
2
1
0
0Dh TSE BTSE BTSR BETA4 BETA3 BETA2 BETA1 BETA0
The BETA register has special Write properties. Only the TSE,
BTSE and BTSR bits can be written; the BETA bits are READ-ONLY.
A write to both bytes in this register will only change the 3 MSB’s
(TSE, BTSE, BTSR), and the 5 LSB’s will remain the same as set
at the factory.
TEMPERATURE SENSOR ENABLED BIT (TSE)
This bit enables the Temperature Sensing operation, including the
temperature sensor, A/D converter and FATR/FDTR register
adjustment. The default mode after power-up is disabled: (TSE = 0).
To enable the operation, TSE should be set to 1. (TSE = 1). When
temp sense is disabled, the initial values for IATR and IDTR registers
are used for frequency control.
When TSE is set to 1, the temperature conversion cycle begins and
will end when two temperature conversions are completed. The
average of the two conversions is in the TEMP registers.
18
FN6668.9
June 20, 2012