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X55060 Datasheet, PDF (6/23 Pages) Intersil Corporation – Dual Voltage Monitor with Integrated System Battery Switch and EEPROM
X55060
Manual Reset
By connecting a push-button from MR to ground or
driven by logic, the designer adds manual system reset
capability. The RESET/RESET pins are asserted when
the push-button is closed and remain asserted for tPURST
after the push-button is released. This pin is debounced
so a push-button connected directly to the device will
have both clean falling and rising edges on MR.
VCC (V1MON), V2MON Threshold Programming
Procedure
The X55060 is shipped with standard VCC (V1MON)
and V2MON threshold (VTRIP1, VTRIP2) voltages.
These values will not change over normal operating
and storage conditions. However, in applications where
the standard thresholds are not exactly right, or if higher
precision is needed in the threshold value, the X55060
trip points may be adjusted. The procedure is described
below, and uses the application of a high voltage con-
trol signal.
Setting the VTRIP Voltage
This procedure is used to set the VTRIP1 or VTRIP2 to a
lower or higher voltage value. It is necessary to reset
the trip point before setting the new value to a lower
level.
To set the new voltage, apply the desired VTRIP1
threshold voltage to the VCC pin or the VTRIP2 voltage
to the V2MON pin (when setting VTRIP2, VCC should
be same voltage as V2MON). Next, tie the WP pin to
the programming voltage VP. Then, send the WREN
command and write to address 01h or to address 0Bh
to program VTRIP1 or VTRIP2, respectively (followed by
data byte 00h). The CS going high after a valid write
operation initiates the programming sequence. Bring
WP LOW to complete the operation.
To check if the VTRIPX has been set, apply a voltage
higher than VTRIPX to the VXMON (x = 1, 2) pin. Dec-
rement VXMON in small steps and observe where the
output switches. The voltage at which this occurs is
the VTRIPX (actual).
CASE A
If the VTRIPX (actual) is lower than the VTRIPX
(desired), then add the difference between VTRIPX
(desired) and VTRIPX (actual) to the original VTRIPX
(desired). This is your new VTRIPX voltage that should
be applied to VXMON and the whole sequence
repeated again (see Fig 6).
CASE B
If the VTRIPX (actual) is higher than the VTRIPX
(desired), perform the reset sequence as described in
the next section. The new VTRIPX voltage to be applied
to VXMON will now be: VTRIPX (desired) - (VTRIPX
(desired) - VTRIPX (actual)).
Note: This operation will not alter the contents of the
EEPROM.
Figure 2. Example System Connection
Unregulated
5V
Supply
Reg
PNP transistor
or P-channel FET
VCC BATT-ON
VBATT
VOUT
VOUT
V2MON
+
V2FAIL
RESET
CS, SCK
SI, SO
VSS
SRAM
Address
Decode
Enable
NMI
Addr
VCC
RESET
SPI µC
6
FN8133.0
March 28, 2005