X55060 Datasheet, PDF (4/23 Pages) Intersil Corporation – Dual Voltage Monitor with Integrated System Battery Switch and EEPROM

X55060
PIN DESCRIPTION (CONTINUED)
Pin Name
Function
16
V_OUT
Output Voltage. V_OUT = V_CC if V_CC > V_TRIP1.
IF V_CC < V_TRIP1, then,
V_OUT = V_CC if V_CC > V_BATT+0.03
V_OUT = V_BATT if V_CC < V_BATT-0.03
Note: There is hysteresis around V_BATT ± 0.03V point to avoid oscillation at or near the
switchover voltage. A capacitance of 0.1µF must be connected to Vout to ensure stability.
17 BATT-ON Battery On. This open drain output goes HIGH when the V_OUT switches to V_BATT and goes LOW
when V_OUT switches to V_CC. It is used to drive an external PNP pass transistor when V_CC = V_OUT
and current requirements are greater than 50mA.
The purpose of this output is to drive an external transistor to get higher operating currents when
the V_CC supply is fully functional. In the event of a V_CC failure, the battery voltage is applied to
the V_OUT pin and the external transistor is turned off. In this “backup condition,” the battery only
needs to supply enough voltage and current to keep SRAM devices from losing their data-there
is no communication at this time.
18
RESET Output/Manual Reset Input. This is an Input/Output pin.
/MR
RESET Output. This is an active LOW, open drain output which goes active whenever V_CC falls
below the minimum V_CC sense level. When RESET is active communication to the device is inter-
rupted. RESET remains active until V_CC rises above the minimum V_CC sense level for 150ms.
RESET also goes active on power-up and remains active for 150ms after the power supply
stabilizes.
MR Input. This is an active LOW debounced input. When MR is active, the RESET/RESET pins
are asserted. When MR is released, the RESET/RESET remains asserted for t_PURST, and then re-
leased.
19
WDO Watchdog Output. WDO is an active low, open drain output which goes active whenever the
watchdog timer goes active. WDO remains active for 150ms, then returns to the inactive state.
20
V_CC
Supply Voltage/V1 Voltage Monitor Input. When the V1MON input is less than the VTRIP1
(V1MON) ^{voltage, RESET and RESET go ACTIVE.}
PRINCIPLES OF OPERATION
Power-On Reset
Application of power to the X55060 activates a Power-
on Reset Circuit. This circuit goes active at about 1V
and pulls the RESET/RESET pin active. This signal
prevents the system microprocessor from starting to
operate with insufficient voltage or prior to stabilization
of the oscillator. When V_CC exceeds the device V_TRIP1
value for 150ms (nominal) the circuit releases
RESET/RESET, allowing the processor to begin exe-
cuting code.
Low V_CC (V1MON) Voltage Monitoring
During operation, the X55060 monitors the V_CC level
and asserts RESET/RESET if supply voltage falls
below a preset minimum V_TRIP1. During this time the
communication to the device is interrupted. The
RESET/RESET signal also prevents the microproces-
sor from operating in a power fail or brownout condi-
tion. The RESET signal remains active until the
voltage drops below 1V. These also remain active until
V_CC returns and exceeds V_TRIP1 for t_PURST.
Low V2MON Voltage Monitoring
The X55060 also monitors a second voltage level and
asserts V2FAIL if the voltage falls below a preset mini-
mum V_TRIP2. The V2FAIL signal is either ORed with
RESET to prevent the microprocessor from operating
in a power fail or brownout condition or used to inter-
rupt the microprocessor with notification of an impend-
ing power failure. V2FAIL remains active until V2MON
returns and exceeds V_TRIP2.
The V2MON voltage sensor is powered by V_OUT. If
V_CC and V_BATT go away (i.e. V_OUT goes away), then
V2MON cannot be monitored.
4
FN8133.0
March 28, 2005