X5323 Datasheet, PDF (6/21 Pages) Intersil Corporation – CPU Supervisor with 32Kb SPI EEPROM

X5323, X5325
Figure 3. V_TRIP Programming Sequence Flow Chart
V_TRIP Programming
Execute
Reset V_TRIP
Sequence
Set V_CC = V_CC Applied =
Desired V_TRIP
New V_CC Applied =
Old V_CC Applied + Error
Execute
Set V_TRIP
Sequence
Apply 5V to V_CC
Decrement V_CC
(V_CC = V_CC - 10mV)
New V_CC Applied =
Old V_CC Applied - Error
Execute
Reset V_TRIP
Sequence
NO
RESET pin
goes active?
YES
Error ≤ Emax
Emax = Maximum Desired Error
Measured V_TRIP -
Desired V_TRIP
Error ≥ Emax
Error < Emax
DONE
Figure 4. Sample V_TRIP Reset Circuit
4.7K
V_TRIP
Adj.
Program
NC
+
1
8
2
7
3 ^X5323/25 6
4
5
V_P
NC ^4.7K
RESET
NC
10K
10K
Reset V_TRIP
Test V_TRIP
Set V_TRIP
6
FN8131.1
October 27, 2005