X5323 Datasheet, PDF (3/21 Pages) Intersil Corporation – CPU Supervisor with 32Kb SPI EEPROM

X5323, X5325
Ordering Information (Continued)
PART NUMBER
RESET
(ACTIVE LOW)
X5323V14-2.7A
PART
MARKING
PART NUMBER
RESET
(ACTIVE HIGH)
X5323V AN X5325V14-2.7A
PART
MARKNIG
V_CC RANGE
TEMP
(V)
V_TRIP RANGE RANGE (°C)
PACKAGE
2.7-5.5
2.85-3.0
0 to 70 14 Ld TSSOP
X5323V14Z-2.7A
(Note)
X5323V Z AN X5325V14Z-2.7A
(Note)
X5325V Z AN
0 to 70 14 Ld TSSOP
(Pb-free)
X5323V14I-2.7A
X5325V14I-2.7A
-40 to 85 14 Ld TSSOP
X5323V14IZ-2.7A
(Note)
X5323V Z AP X5325V14IZ-2.7A
(Note)
X5325V Z AP
-40 to 85 14 Ld TSSOP
(Pb-free)
X5323P-2.7
X5323P F X5325P-2.7
X5325P F
2.7-5.5
2.55-2.7
0 to 70 8 Ld PDIP
X5323PZ-2.7 (Note) X5323P Z F X5325PZ-2.7
X5325P Z F
0 to 70 8 Ld PDIP (Pb-free)
X5323PI-2.7
X5323P G X5325PI-2.7
X5325P G
-40 to 85 8 Ld PDIP
X5323PIZ-2.7 (Note) X5323P Z G X5325PIZ-2.7
X5325P Z G
-40 to 85 8 Ld PDIP (Pb-free)
X5323S8-2.7*
X5323 F
X5325S8-2.7*
X5325 F
0 to 70 8 Ld SOIC
X5323S8Z-2.7* (Note) X5323 Z F X5325S8Z-2.7* (Note) X5325 Z F
0 to 70 8 Ld SOIC (Pb-free)
X5323S8I-2.7*
X5323 G
X5325S8I-2.7*
X5325 G
-40 to 85 8 Ld SOIC
X5323S8IZ-2.7* (Note) X5323 Z G X5325S8IZ-2.7* (Note) X5325 Z G
-40 to 85 8 Ld SOIC (Pb-free)
X5323V14-2.7*
X5325V14-2.7*
X5325V F
0 to 70 14 Ld TSSOP
X5323V14Z-2.7*
(Note)
X5323V Z F X5325V14Z-2.7*
(Note)
X5325V Z F
0 to 70 14 Ld TSSOP
(Pb-free)
X5323V14I-2.7*
X5325V14I-2.7*
-40 to 85 14 Ld TSSOP
X5323V14IZ-2.7*
(Note)
X5323V Z G X5325V14IZ-2.7*
(Note)
X5325V Z G
-40 to 85 14 Ld TSSOP
(Pb-free)
*Add "-T1" suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3
FN8131.1
October 27, 2005