ISL23318_14 Datasheet, PDF (6/19 Pages) Intersil Corporation – Single, 128-taps Low Voltage Digitally Controlled Potentiometer (XDCP™)

ISL23318
Analog Specifications V_CC = 2.7V to 5.5V, V_LOGIC = 1.2V to 5.5V over recommended operating conditions unless otherwise stated.
Boldface limits apply over the operating temperature range, -40°C to +125°C. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 20)
TYP
(Note 8)
MAX
(Note 20)
UNITS
TCR Resistance Temperature Coefficient
(Note 19)
W option; Wiper register set between
19 hex and 7F hex
220
ppm/°C
U option; Wiper register set between 19
100
hex and 7F hex
ppm/°C
T option; Wiper register set between 19
75
hex and 7F hex
ppm/°C
Operating Specifications V_CC = 2.7V to 5.5V, V_LOGIC = 1.2V to 5.5V over recommended operating conditions unless otherwise stated.
Boldface limits apply over the operating temperature range, -40°C to +125°C.
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 20)
TYP
MAX
(Note 8) (Note 20)
UNITS
I_LOGIC V_LOGIC Supply Current (Write/Read)
V_LOGIC = 5.5V,
f_SCL = 400kHz
V_CC
(for
= 5.5V,
I²C active
read
and
write)
200
µA
V_LOGIC = 1.2V,
f_SCL = 400kHz
V_CC
(for
= 1.7V,
I²C active
read
and
write)
5
µA
I_CC V_CC Supply Current (Write/Read)
I_{LOGIC SB} V_LOGIC Standby Current
V_LOGIC = 5.5V, V_CC = 5.5V
V_LOGIC = 1.2V, V_CC = 1.7V
IV^2LC^OGin^ICte=rfaVc^Ce^C
=
in
5.5V,
standby
18
µA
10
µA
1.3
µA
V_LOGIC = 1.2V, V_CC = 1.7V,
I²C interface in standby
0.4
µA
I_{CC SB} V_CC Standby Current
V_LOGIC = V_CC = 5.5V,
I²C interface in standby
1.5
µA
V_LOGIC = 1.2V, V_CC = 1.7V,
I²C interface in standby
1
µA
I_{LOGIC SHDN} V_LOGIC Shutdown Current
V_LOGIC = V_CC = 5.5V,
I²C interface in standby
1.3
µA
V_LOGIC = 1.2V, V_CC = 1.7V,
I²C interface in standby
0.4
µA
I_{CC SHDN} V_CC Shutdown Current
V_LOGIC = V_CC = 5.5V,
I²C interface in standby
1.5
µA
V_LOGIC = 1.2V, V_CC = 1.7V,
I²C interface in standby
1
µA
I_LkgDig Leakage Current, at Pins A0, A1, SDA, SCL Voltage at pin from GND to V_LOGIC
-0.4
<0.1
0.4
µA
t_DCP Wiper Response Time
SCL rising edge of the acknowledge bit
1.5
µs
after data byte to wiper new position
tShdnRec DCP Recall Time from Shutdown Mode SCL rising edge of the acknowledge bit
1.5
µs
after ACR data byte to wiper recalled
position and RH connection
V_CC, V_LOGIC V_{CC ,}V_LOGIC Ramp Rate
Ramp
(Note 21)
Ramp monotonic at any level
0.01
50
V/ms
6
FN7887.0
July 26, 2011