FN4496 Datasheet, PDF (6/14 Pages) Intersil Corporation – Advanced PWM and Dual Linear Power Control

HIP6017
SS (Pin 12)
Connect a capacitor from this pin to ground. This capacitor,
along with an internal 11µA current source, sets the soft-
start interval of the converter.
Pulling this pin low with an open drain signal will shutdown
the IC.
VID0, VID1, VID2, VID3, VID4 (Pins 7, 6, 5, 4 and 3)
VID0-4 are the input pins to the 5-bit DAC. The states of these
five pins program the internal voltage reference (DACOUT).
The level of DACOUT sets the core converter output voltage.
It also sets the core PGOOD and OVP thresholds.
COMP1 and FB1 (Pins 20, and 21)
COMP1 and FB1 are the available external pins of the PWM
error amplifier. The FB1 pin is the inverting input of the error
amplifier. Similarly, the COMP1 pin is the error amplifier
output. These pins are used to compensate the voltage-
control feedback loop of the PWM converter.
GND and GND2 (Pins 17 and 9)
Signal grounds for the IC. All voltage levels are measured
with respect to these pins.
PGOOD (Pin 8)
PGOOD is an open collector output used to indicate the
status of the PWM converter output voltages. This pin is
pulled low when the core output is not within ±10% of the
DACOUT reference voltage and the other outputs are below
their under-voltage thresholds. The PGOOD output is open
for VID codes that inhibit operation. See Table 1.
PHASE1 (Pin 26)
Connect the PHASE pin to the PWM converter’s upper
MOSFET source. This pin is used to monitor the voltage
drop across the upper MOSFET for over-current protection.
UGATE1 (Pin 27)
Connect UGATE pin to the PWM converter’s upper
MOSFET gate. This pin provides the gate drive for the upper
MOSFET.
PGND (Pin 24)
This is the power ground connection. Tie the synchronous
PWM converter’s lower MOSFET source to this pin.
LGATE1 (Pin 25)
Connect LGATE1 to the synchronous PWM converter’s
lower MOSFET gate. This pin provides the gate drive for the
lower MOSFET.
VCC (Pin 28)
Provide a 12V bias supply for the IC to this pin. This pin also
provides the gate charge for all the MOSFETs controlled by
the IC.
FAULT/RT (Pin 13)
This pin provides oscillator switching frequency adjustment.
Placing a resistor (R_T) from this pin to GND, the nominal
200kHz switching frequency is increased according to the
following equation:
Fs ≈ 200kHz + _R--⁵---_T-^x---₍-¹-_k--⁰--_Ω--⁶---₎
(R_T to GND)
Conversely, connecting a pull-up resistor (R_T) from this pin
to VCC reduces the switching frequency according to the
following equation:
Fs ≈ 200kHz – _R---⁴--_T--^x--₍-¹-_k--⁰--_Ω--⁷---₎
(R_T to 12V)
Nominally, this pin voltage is 1.26V, but is pulled to VCC in
the event of an over-voltage or over-current condition.
GATE3 (Pin 18)
Connect this pin to the gate of an external MOSFET or the
base of an external bipolar NPN transistor. This pin provides
the drive for the linear controller’s pass transistor.
FB3 (Pin 19)
Connect this pin to a resistor divider to set the linear
controller output voltage.
VOUT2 (Pin 16)
Output of the linear regulator. Supplies current up to 230mA.
FB2 (Pin 14)
Connect this pin to a resistor divider to set the linear
regulator output.
VIN2 (Pin 15)
VIN2 provides the input power to the integrated linear
regulator. Connect this pin to the 3.3VDC supply. This pin is
also monitored for UV events.
V33 (Pin 10)
Connect this pin to the 3.3VDC supply.
Description
Operation
The HIP6017 monitors and precisely controls 3 output
voltage levels (Refer to Figures 1, 2, and 3). It is designed
for microprocessor computer applications with 3.3V and 5V
power and 12V bias input from an ATX power supply. The IC
has one PWM controller, a linear controller, and a linear
regulator. The PWM controller (PWM) is designed to
regulate the microprocessor core voltage (V_OUT1). PWM
controller drives 2 MOSFETs (Q1 and Q2) in a synchronous-
rectified buck converter configuration and regulates the core
voltage to a level programmed by the 5-bit digital-to-analog
converter (DAC). An integrated linear regulator supplies the
2.5V clock generator power (V_OUT2). The linear controller
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