ISL6549 Datasheet, PDF (5/18 Pages) Intersil Corporation – Single 12V Input Supply Dual Regulator Synchronous Rectified Buck PWM and Linear Power Controller

ISL6549
Electrical Specifications
Recommended Operating Conditions, unless otherwise noted. VCC12 = 12V
Temperature = 0 to +70°C (typical = +25°C) for Commercial; Temperature = -40 to + 85°C (typical = +25°C) for
Industrial. Refer to Block Diagram, Simplified Power System Diagram, and Typical Application Schematic.
(Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP MAX UNITS
Sawtooth Amplitude (Note 6)
Soft-Start Interval
REFERENCE VOLTAGE
DV_OSC
T_SS
F_OSC = 620kHz
1.5
V
6.8
ms
Reference Voltage
V_REF
ISL6549C; For Error Amp 1 and 2
ISL6549I; For Error Amp 1 and 2
0.792
0.8
0.808
V
0.788
0.8
0.812
V
PWM CONTROLLER ERROR AMPLIFIER
DC Gain (Note 6)
Gain-Bandwidth Product (Note 6)
Slew Rate (Note 6)
FB Input Current
COMP High Output Voltage
COMP Low Output Voltage
COMP High Output, Source Current
Undervoltage Level (V_FB/V_REF)
PWM CONTROLLER GATE DRIVERS
GBWP
SR
⎜I_I ⎜
V_OUT High
V_OUT Low
I_OUT High
V_UV
R_L = 10K, C_L = 10pF
R_L = 10K, C_L = 10pF
R_L = 10K, C_L = 10pF
V_FB = 0.8V
96
dB
20
MHz
8
V/µs
0.1
1.0
µA
4.8
V
0.6
V
-2.8
mA
70
75
80
%
UGATE Maximum Voltage
LGATE Maximum Voltage
UGATE and LGATE Minimum Voltage
UGATE Source Output Impedance
UGATE Sink Output Impedance
LGATE Source Output Impedance
LGATE Sink Output Impedance
LINEAR REGULATOR (LDO_DR)
V_HUGATE
V_HLGATE
V_LGATE
R_DS(ON)
R_DS(ON)
R_DS(ON)
R_DS(ON)
VCC12 = 12V; PHASE = 12V
VCC12 = 12V; based on PVCC5 voltage
VCC12 = 12V; PHASE = 0V
VCC12 = 12V; I_GATE = 100mA
VCC12 = 12V; I_GATE = 100mA
VCC12 = 12V; I_GATE = 100mA
VCC12 = 12V; I_GATE = 100mA
17
17.5
18
5.25
6
V
0
0.5
V
0.8
Ω
0.7
Ω
0.8
Ω
0.4
Ω
DC Gain (Note 6)
Gain
R_L = 10K, C_L = 10pF
100
dB
Gain-Bandwidth Product (Note 6)
GBWP R_L = 10K, C_L = 10pF
2
MHz
Slew Rate (Note 6)
SR
R_L = 10K, C_L = 10pF
6
V/µs
LDO_FB Input Current
⎜I_I ⎜
V_{LDO_FB} = 0.8V
0.1
1.0
µA
LDO_DR High Output Voltage
V_OUT High VCC12 = 12V
11.0 11.5
V
LDO_DR Low Output Voltage
V_OUT Low
0.0
0.5
V
LDO_DR High Output Source Current
I_OUT High V_OUT = 2.0V
2.0
mA
LDO_DR Low Output Sink Current
I_OUT Low
0.5
mA
Undervoltage Level (V_{LDO_FB}/V_REF)
V_UV
Percent of Nominal
70
75
80
%
NOTES:
4. Current in VCC5 is actually higher disabled, due to extra current required to pull down against the FS_DIS pin. VCC12 current is lower disabled.
5. Guaranteed by design, not production tested. Exceeding the maximum current from PVCC5 may result in degraded performance and unsafe
operation.
6. Guaranteed by design, not production tested.
5
FN9168.2
September 22, 2006