ISL6144_14 Datasheet, PDF (5/30 Pages) Intersil Corporation – High Voltage ORing MOSFET Controller

ISL6144
Absolute Maximum Ratings (Note 8) T_A = +25°C
V_IN, V_OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +100V
GATE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V_IN +12V
HVREF. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V_IN -5V
COMP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V_OUT
VSET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V_OUT -5V
FAULT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 16V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2
Thermal Information
Thermal Resistance (Typical)
θ_JA (°C/W) θ_JC (°C/W)
TSSOP Package (Note 9) . . . . . . . . . .
90
N/A
QFN Package (Notes 10, 11) . . . . . . . .
35
5
Maximum Junction Temperature (Plastic Package) . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . +9V to +75V
Temperature Range (T_A) . . . . . . . . . . . . . . . . . . . . -40°C to +105°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
8. All voltages are relative to GND, unless otherwise specified.
9. θ_JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
10. θ_JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
11. For θ_JC, the "case temp" location is the center of the exposed metal pad on the package underside.
Electrical Specifications V_IN = 48V, T_A = -40°C to +105°C, Unless Otherwise Specified. Boldface limits apply over the operating
temperature range, -40°C to +105°C.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
(Note 12)
TYP
MAX
(Note 12) UNITS
BIAS “V_IN”
POR Rising
12V Bias Current
48V Bias Current
75V Bias Current
GATE
POR_L2H
I_12V
I_48V
I_75V
V_IN Rising to V_GATE > V_IN + 7.5V
V_IN = 12V, V_GATE = V_IN + V_GQP
V_IN = 48V, V_GATE = V_IN + V_GQP
V_IN = 75V, V_GATE = V_IN + V_GQP
8.9
-
-
3.5
-
4.5
-
5
-
V
-
mA
-
mA
-
mA
Charge Pump Voltage
Gate Low Voltage Level
Low Pull Down Current
High Pull Down Current
Slow Turn-off Time
Fast Turn-off Time
V_GQP
V_GL
I_PDL
I_PDH
t_toffs
t_toff
V_IN = 12V to 75V
V_IN - V_OUT < 0V
Cgs = 39nF, I_PDL = Cgs*dVgs/T_tofs
Cgs = 39nF, I_PDH = Cgs*dVgs/T_toff
Cgs = 39nF
V_IN + 9 V_IN + 10.5 V_IN + 12 V
-0.3
V_IN
V_IN + 0.5 V
-
5
-
mA
-
2
-
A
-
-
100
µs
Turn-off from V_GATE = V_IN + V_GQP to V_IN + 1V with
-
Cgs = 39nF (includes HS Comparator delay time)
250
300
ns
Start-up “Turn-On” Time
t_ON
Turn-on from V_GATE = V_IN to V_IN + 7.5V into 39nF
-
1
-
ms
GATE Turn-On Current
I_ON
V_IN = 9V to 75V
-
1
-
mA
CONTROL AND REGULATION I/O
HR Amplifier Forward Voltage
Regulation
HS COMP Externally
Programmable Threshold
V_{FWD_HR} ISL6144 controls voltage across FET Vds to
10
V_{FWD_HR} during static forward operation at loads
resulting in I * r_DS(ON) < V_{FWD_HR}
V_TH(HS) Externally programmable threshold for noise
0
sensitivity (system dependent), typical 0.05V to 0.3V
20
0.05
30
mV
5.3
V
HS Comparator Offset Voltage
Comp Input Current
(Bias Current)
V_OS(HS)
I_COMP
-40
0
25
mV
-
1.1
-
µA
HVREF Voltage (V_IN - HVREF) HV_REF(VZ) V_IN = 9V to 75V
-
5.5
-
V
5
FN9131.7
October 6, 2011