ISL6144_14 Datasheet, PDF (10/30 Pages) Intersil Corporation – High Voltage ORing MOSFET Controller

ISL6144
The duration of the reverse current pulse is a few hundred
nanoseconds and is normally kept well below current rating
of the ORing MOSFET.
Reducing the value of V_TH(HS) results in lower reverse
current amplitude and reduces transients on the common
bus output voltage.
HVREF and COMP Capacitor Values
HVREF CAPACITOR (C1)
this capacitor is necessary to stabilize the HV_REF(VZ) supply
and a value of 150nF is sufficient. Increasing this value will
result in gate turn-on time increase.
COMP CAPACITOR (C2)
Placed between V_OUT and COMP pins to provide filtering
and decoupling. A 10nF capacitor is adequate for most
cases.
Protecting VIN and VOUT from High dv/dt Events
In hot swap applications lacking adequate VIN and VOUT
bulk capacitance and where the ISL6144 is directly
connected to a prebiased bus exposing either the VIN or
VOUT pins directly to high dv/dt transients, these pins must
be filtered to prevent catastrophic damage caused by the
high dv/dt transients. A simple RC filter using a pin 2 series
resistor, of 10 -100Ω and the 100nF or greater best design
practices decoupling capacitor to ground. This will provide a
>1µs rise time on the VIN pin to protect it. A resistor of ~3.3
times the value should be added in series with the VOUT pin
to reduce the introduced HS Vth error.
Alternately, the programmed HS Vth can be adjusted upward
by the voltage across R_VIN as described on page 9.
Hot Swapped
Q₁
Input
R_in
10-100
2
VIN
R_out
~3.3X R_in
16
VOUT
C_{1 >}
100nF
3 _HVREF
15
COMP
ISL6144
8
GND
VSET ¹⁴
10
FN9131.7
October 6, 2011