ISL6144_14 Datasheet, PDF (19/30 Pages) Intersil Corporation – High Voltage ORing MOSFET Controller

ISL6144
Gate Fast Turn-off Test
During normal operation, the ISL6144 provides gate drive
voltage for the ORing MOSFET when the Input voltage
exceeds the output voltage. The current flows in the forward
direction from the input to the output. Now, what happens if
the input voltage drops quickly below the output voltage as a
result of a failure on the input sourcing power supply while
the MOSFET remained on? The answer is: If the MOSFET is
kept on, current starts to flow in the reverse direction from
the output to the input. Of course this is not desired nor
acceptable. It will lead to effectively shorting the output and
causing an overall system failure. In order to block this
reverse current, the ISL6144 senses the voltage at both VIN
and COMP pins (this is V_OUT voltage reduced by a resistor
programmable threshold (V_TH(HS), it is programmed to
55mV on the EVAL board and could be adjusted by
changing R₁, R₄ values for both feeds. If V_IN drops below
COMP (V_OUT - V_TH(HS), the High Speed Comparator turns
off the gate of the ORing MOSFET very quickly, the gate pull
down current I_PDH is 2A. As a result the reverse current flow
is prevented. The maximum turn-off time is less than 300ns
when using an ORing MOSFET(s) with an equivalent gate-
source capacitance of 39nF (equivalent to Q_TOT = 390nC at
V_GS = 10V).
On the ISL6144EVAL1Z board, FDB3632 has an equivalent
gate-source capacitance of 8.4nF, some of the tests are
performed while an external gate to source capacitance is
added to demonstrate gate current sink capability.
V_IN1 = V_IN2 = 48V; RESISTIVE LOAD = 4A, C_GS(EXT) = 0nF
V_G2
10V/DIV
I_IN1
2A/DIV
V_OUT
10V/DIV
t_DELAY(HS) is the High Speed Comparator internal worst-
case time delay. The setup in Figure 17 can be used to
perform the Input dead-short test; a pulse generator is
connected between Gate-Source of Q_SHORT1 (use pulse
mode single shot, set the frequency to <10Hz and pulse
width of approximately 10ms, t_RISE = 1µs). Follow steps 1
through 5 in the two feed parallel operation section. Make
sure that both feeds operate in parallel current sharing
mode. Proceed with the short test by applying the single
pulse to the gate of Q_SHORT1. Once turned on, Q_SHORT1
shorts V_IN1 causing it to fall quickly (in less than 10µs).
Figures 21, 22 and 23 show the results for different
combinations of C_GS1 and load current. Make sure to
connect the V_IN1 shorting-MOSFET terminals as close as
possible to the V_IN-GND (J4 to J6) terminals on the EVAL
board to minimize lead impedance and reduce parasitic
ringing.
I_IN1
2A/DIV
V_IN1 = V_IN2 = 48V;
RESISTIVE LOAD = 6A, C_gs(ext) = 33nF
REVERSE CURRENT
V_GS1
5V/DIV
V_OUT
10V/DIV
V_IN1
10V/DIV
0.1µs/DIV
FIGURE 22. FAST SPEED TURN-OFF (MOSFET WITH
Q_TOT = 8.4nc) AND 33nF EXTERNAL C_GS
V_GS1
2V/DIV
0.1µs/DIV
REVERSE CURRENT DISSAPPEARS
WHEN GATE IS COMPLETELY OFF
FIGURE 21. FAST SPEED TURN-OFF
(MOSFET WITH Q_TOT = 8.4nc)
Worst-case turn-off time can be calculated as:
t_toff(WC)
=
t_DEL
A
Y
(
H
S
)
+
⎛
⎝⎜ ^{C G}
S
I^-V-_P^----GD----S-_H^--_{⎠⎟⎞}
t_toff(WC) = 50ns + _⎝⎛39nF1--₂--²--_A--^V--_⎠⎞ = 284ns
(EQ. 9)
I_IN1
2A/DIV
V_G2
10V/DIV
V_GS1
5V/DIV
0.1µs/DIV
V_IN1 = V_IN2 = 48V;
RESISTIVE LOAD = 6A, C_gs(ext) = 33nF
V_OUT
10V/DIV
FIGURE 23. FAST SPEED TURN-OFF (MOSFET WITH
Q_TOT = 8.4nc) AND 33nF EXTERNAL C_gs
19
FN9131.7
October 6, 2011