ISL6144_14 Datasheet, PDF (20/30 Pages) Intersil Corporation – High Voltage ORing MOSFET Controller

ISL6144
The ISL6144EVAL1Z board has V_TH(HS) of 55mV. It can be
changed if performance is found to be unacceptable with this
value. V_TH(HS) can affect the amplitude of the reverse current
(short pulse) that might flow before the gate is effectively
turned off (details on how to select V_TH(HS) is included in a
later section of this application note). The r_DS(ON) and internal
HS comp offset also contribute to the amplitude of the reverse
current pulse. A short event on a single feed may cause
ringing on the ground pins, the V_IN, and on the V_OUT pins.
This ringing may cause false turn-off on the healthy feeds.
Using decoupling capacitors both at the V_IN and V_OUT pins
help in filtering this high frequency ringing and prevent false
turn-off of parallel feeds. Figure 23 shows that the gate of
second feed V_G2 (measured with respect to ground) is not
affected when feed 1 input is shorted.
Power Supply Slow Turn-off
In many cases, a single power feed is turned off for
diagnosis, maintenance or replacement. The Input voltage
drops slowly (most probably in few ms). When voltage at V_IN
pin starts dropping with respect to V_OUT pin. The Hysteretic
Regulating Amplifier starts pulling down current (I_PDL)
opposite to the charge pump current. This reduces the gate
voltage gradually until the MOSFET is completely turned off.
The slow turn-off is accomplished with zero reverse current.
An internal 20µs delay filters out any false trip off due to
noise or glitches that might be present on the supply line.
The slow speed turn-off mechanism is shown in Figure 24:
V_IN1 = V_IN2 = 48V
I_IN2
V_OUT
V_GS2
V_IN2
5ms/DIV
Input Voltage is falling at a slow rate (Figure 24, top scope
shot shows a 20ms fall time for the input voltage).
V_OUT (Common Bus) remains almost unchanged at around
48V. It drops by a value equivalent to the increase in the
portion of the load current passing through the remaining
feed multiplied by the MOSFET’s r_DS(ON).
At the beginning of the slow turn-off, the gate drive Voltage
V_GS1 (measured between the Gate and Source of the
ORing MOSFET using a differential probe) starts to drop at a
slower rate. This is attributed to the effect of the 20µs
filtering-delay. Afterwards a stronger pull down current starts
and finally the high-speed turn-off completes the gate turn-
off. Current through the turned off feed is also shown to be
positive and the turn-off is complete with no reverse current.
Figure 25 shows the same slow turn-off for a 12V input
voltage case.
V_IN1 = V_IN2 = 12V
5ms/DIV
ZOOMED IN VIEW
V_{GS1 (DIFF PROBE)}
5V/DIV
V_OUT
2V/DIV
V_IN1
2V/DIV
I_IN2
2A/DIV
V_OUT
10V/DIV
ZOOMED IN VIEW
V_GS2
5V/DIV
V_IN2
10V/DIV
20µs/DIV
I_IN1
2A/DIV
FIGURE 25. SLOW SPEED TURN-OFF (C_GSTOT = 8.4nF + 33nF)
20µs/DIV
FIGURE 24. SLOW SPEED TURN-OFF (C_GSTOT = 8.4nF + 33nF)
20
FN9131.7
October 6, 2011