ISL59450 Datasheet, PDF (5/37 Pages) Intersil Corporation – Multiformat Video Crosspoint with Integrated Sync Separator

ISL59450
Serial Interface (I²C) Specifications
SYMBOL
PARAMETER
CONDITIONS
MIN
MAX
(Note 1) TYP (Note 1) UNIT
V_OL
SDA Output Buffer LOW Voltage
I_LI
Input Leakage Current on SCL
I_LO
I/O Leakage Current on SDA
TIMING CHARACTERISTICS
I_OL = 4mA
V_IN = 5.5V
V_IN = 5.5V
0
0.4
V
0.1
1
µA
0.1
1
µA
f_SCL
t_LOW
t_HIGH
t_SU:STA
t_HD:STA
t_HD:DAT
SCL Frequency
Clock LOW Time
Clock HIGH Time
START Condition Set-up Time
START Condition Hold Time
Input Data Hold Time
Measured at the 30% of V_D crossing.
1.3
Measured at the 70% of V_D crossing.
0
SCL rising edge to SDA falling edge. Both 0.6
crossing 70% of V_D.
From SDA falling edge crossing 30% of V_D 0.6
to SCL falling edge crossing 70% of V_D.
From SCL falling edge crossing 70% of V_D
0
to SDA entering the 30% to 70% of V_D
window.
400
kHz
µs
0.9
µs
µs
µs
0.9
µs
t_SU:STO
STOP Condition Set-up Time
From SCL rising edge crossing 70% of V_D, 0.6
µs
to SDA rising edge crossing 30% of V_D
t_R
SDA and SCL Rise Time
From 30% to 70% of V_D
20 +
ns
0.1 x Cb
t_F
SDA and SCL Fall Time
From 70% to 30% of V_D
20 +
ns
0.1 x Cb
Cb
Capacitive Loading of SDA or SCL
Total on-chip and off-chip
400
pF
Cpin
SDA and SCL Pin Capacitance
10
pF
NOTE:
1. Parts are 100% tested at +25°C. Temperature limits established by characterization and are not production tested.
I²C Timing Diagram
t_F
t_HIGH
t_LOW
t_R
SCL
t_SU:STA
SDA
(INPUT TIMING)
t_HD:STA
t_HD:DAT
t_SU:STO
SDA
(OUTPUT TIMING)
5
FN7510.0
February 14, 2008