ISL12023 Datasheet, PDF (5/28 Pages) Intersil Corporation – Low Power RTC with Battery-Backed SRAM and Embedded Temp Compensation ±5ppm with Auto Daylight Saving

ISL12023
I²C Interface Specifications Test Conditions: V_DD = +2.7 to +5.5V, T_A = -40°C to +85°C, unless otherwise specified. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 9)
TYP
MAX
(Note 5) (Note 9)
UNITS NOTES
t_HD:STO
t_DH
t_R
t_F
Cb
STOP Condition Hold Time
Output Data Hold Time
SDA and SCL Rise Time
SDA and SCL Fall Time
Capacitive Loading of SDA or SCL
From SDA rising edge to SCL
600
falling edge. Both crossing
70% of V_DD.
From SCL falling edge
0
crossing 30% of V_DD, until
SDA enters the 30% to 70% of
V_DD window.
From 30% to 70% of V_DD.
20 + 0.1 x Cb
From 70% to 30% of V_DD.
20 + 0.1 x Cb
Total on-chip and off-chip
10
ns
ns
300
ns
8
300
ns
8
400
pF
8
R_PU
SDA and SCL Bus Pull-up Resistor Maximum is determined by t_R
1
Off-chip
and t_F.
For Cb = 400pF, max is about
2kΩ~2.5kΩ.
For Cb = 40pF, max is about
15kΩ~20kΩ
kΩ
8
NOTES:
2. Temperature Conversion is inactive below V_BAT = 2.7V. Device operation is not guaranteed at V_BAT<1.8V.
3. IRQ/F_OUT Inactive.
4. V_DD > V_BAT +V_BATHYS
5. Specified at +25°C.
6. In order to ensure proper timekeeping, the V_{DD SR-} specification must be followed.
7. Limits should be considered typical and are not production tested.
8. These are I²C specific parameters and are not tested, however, they are used to set conditions for testing devices to validate specification.
9. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by
characterization and are not production tested.
10. Specifications are typical and require using a recommended crystal (see “Application Section” on page 24).
11. Minimum V_DD and/or V_BAT of 1V to sustain the SRAM. The value is based on characterization and it is not tested.
5
FN6682.2
June 24, 2009