ISL12023 Datasheet, PDF (26/28 Pages) Intersil Corporation – Low Power RTC with Battery-Backed SRAM and Embedded Temp Compensation ±5ppm with Auto Daylight Saving

ISL12023
Where α is the temperature constant, with a typical value of
0.034 ppm/°C.
T₀ is the turnover temperature of the crystal, which is the
apex of the parabolic curve. If the two factors α and T₀ are
known, it is possible to correct for crystal temperature error
to very high accuracy.
The crystal will have an initial accuracy error at room
temperature, typically specified at ±20°C. The other
important characteristic is the capacitances associated with
the crystal. The load capacitance is normally specified at
12.5pF, although it can be lower in some cases. There is
also a motional capacitance, which affects the ability of the
load capacitance to pull the oscillation frequency, and it is
usually in the range of 2.2fF to 4.0fF.
RTC CLOCK CONTROL
The ISL12023 uses two mechanisms to adjust the RTC clock
and correct for the temperature error of the external crystal.
The Analog Trimming (AT) adjusts the load capacitance
seen by the crystal. Analog switches connect the appropriate
capacitance to change the frequency in increments of 1ppm.
The adjustment range for the ISL12023 is +32/-31ppm.
The AT can be further refined using the BETA register. The
BETA register function is to allow for changes in C_M (motional
capacitance), which will affect the incremental frequency
change of the AT adjustment. A simple test procedure uses
the BETA register to bring the step size back to 1ppm.
Normally, the crystal frequency is adjusted at room
temperature to zero out the frequency error using the IATRxx
register bits (initial Analog Trimming). In addition, the IATRxx
setting is varied up and down to record the variation in
oscillator frequency compared to the step change in IATRxx.
Once that value is known then the BETA register is used to
adjust the step size to be as close to 1ppm per IATRxx step as
possible. After that adjustment is made, then any ISL12023
temperature compensation adjustments will use a 1ppm
change for each bit change in the internal AT adjustment.
The Digital Trimming (DT) uses clock pulse add/subtract
logic to change the RTC timing during temperature
compensation. The DT steps are much coarser than the AT
steps and are therefore used for large adjustments. The DT
steps are 30.5ppm, and the range is from -305ppm to
+305ppm. The Frequency Output function will show the
clock variation with DT settings, except for the 32,768Hz
setting, which only shows the AT control.
ACTIVE TEMPERATURE COMPENSATION
The ISL12023 contains an intelligent logic circuit which takes
the temperature sensor digital value as the only input
variable. It then uses the register values for the crystal
variables α and T₀, and combines those with calibration from
the BETA and ITR0 registers to produce “Final” values for
the AT and DT, known as FATR (Final AT Register) and
FDTR (Final DT Register). Those AT and DT values
combine to directly compensate for the temperature error
shown in Figure 21.
The temperature sensor produces a new value every 60s
(or up to 10 minutes in battery mode), which triggers the
logic to calculate a new AT/DT value set. For every
temperature calculation result, there can only be one
corresponding AT/DT correction value.
Measuring Oscillator Accuracy
The best way to analyze the ISL12023 frequency accuracy
is to set the IRQ/F_OUT pin for a specific frequency, and look
at the output of that pin on a high accuracy frequency
counter (at least 7 digits accuracy). Note that the IRQ/F_OUT
is an drain output and will require a pull-up resistor.
Using the 1.0Hz output frequency is the most convenient as
the ppm error is as expressed in Equation 7:
ppm error = (F _OUT – 1 ) • 1e6
(EQ. 7)
Other frequencies may be used for measurement but the
error calculation becomes more complex.
When the proper layout guidelines are observed, the
oscillator should start-up in most circuits in less than 1s.
When testing RTC circuits, a common impulse is to apply a
scope probe to the circuit at the X2 pin (oscillator output) and
observe the waveform. DO NOT DO THIS! Although in some
cases you may see a usable waveform, due to the parasitics
(usually 10pF to ground) applied with the scope probe, there
will be no useful information in that waveform other than the
fact that the circuit is oscillating. The X2 output is sensitive to
capacitive impedance so the voltage levels and the
frequency will be affected by the parasitic elements in the
scope probe. Use the F_OUT output and a frequency counter
for the most accurate results.
Temperature Compensation Operation
The ISL12023 temperature compensation feature needs to
be enabled by the user. This must be done in a specific
order, as follows:
1. Read register 0Dh, the BETA register. This register
contains the 5-bit BETA trimmed value which is
automatically loaded on initial power-up. Mask off the
5LSB’s of the value just read.
2. Bit 7 of the BETA register is the master enable control for
temperature sense operation. Set this to “1” to allow
continuous temperature frequency correction. Frequency
correction will then happen every 60s with V_DD applied.
3. Bits 5 and 6 of the BETA register control temperature
compensation in battery-backup mode (see Table 15).
Set the values for the operation desired.
4. Write back to register 0Dh making sure not to change the
5 LSB values, and include the desired compensation
control bits.
Note that every time the BETA register is written with the
TSE bit = 1, a temperature compensation cycle is instigated
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FN6682.2
June 24, 2009