English
Language : 

X96011_08 Datasheet, PDF (4/18 Pages) Intersil Corporation – Temperature Sensor with Look-Up Table Memory and DAC
X96011
D/A Converter Characteristics (See pg. 5 for standard conditions)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN TYP
MAX
UNIT
IFS
OffsetDAC
FSErrorDAC
DNLDAC
Iout Full Scale Current
Iout D/a Converter Offset Error
Iout D/a Converter Full Scale Error
Iout D/a Converter
Differential Nonlinearity
DAC input Byte = FFh,
1.56 1.58
1.6
mA
Source or sink mode, V(IOUT) is
VCC -1.2V in source mode and 1.2V in
1
sink mode.
-2
(Notes 5, 6 )
-0.5
1
LSB
2
LSB
0.5
LSB
INLDAC
Iout D/a Converter Integral
Nonlinearity With Respect To A Straight Line
Through 0 And The Full Scale Value
-1
1
LSB
VISink
VISource
IOVER
IUNDER
I1 Sink Voltage Compliance
In this range the current at I1 vary < 1% 1.2
I1 Source Voltage Compliance
In this range the current at I1 vary < 1% 0
I1 Overshoot On D/a Converter Data Byte
Transition
I1 Undershoot On D/a Converter Data Byte
Transition
DAC input byte changing from 00h to
FFh and vice versa, V(I1) is VCC - 1.2V
in source mode and 1.2V in sink mode.
(Note 7)
VCC
V
VCC - 1.2
V
0
µA
0
µA
trDAC
I1 Rise Time On D/a Converter Data Byte
Transition; 10% To 90%
5
30
µs
TCOI1I2
Temperature Coefficient Of Output
Current Iout
See Figure 5
±200
ppm/°C
[ ] NOTES:
5. LSB is defined as
2
3
x
V(VRef)
255
divided by the resistance between R1 or R2 to Vss.
6. OffsetDAC: The Offset of a DAC is defined as the deviation between the measured and ideal output, when the DAC input is 01h. It is expressed
in LSB.
FSErrorDAC: The Full Scale Error of a DAC is defined as the deviation between the measured and ideal output, when the input is FFh. It is
expressed in LSB. The OffsetDAC is subtracted from the measured value before calculating FSErrorDAC.
DNLDAC: The Differential Non-Linearity of a DAC is defined as the deviation between the measured and ideal incremental change in the output
of the DAC, when the input changes by one code step. It is expressed in LSB. The measured values are adjusted for Offset and Full Scale Error
before calculating DNLDAC.
INLDAC: The Integral Non-Linearity of a DAC is defined as the deviation between the measured and ideal transfer curves, after adjusting the
measured transfer curve for Offset and Full Scale Error. It is expressed in LSB.
7. These parameters are periodically sampled and not 100% tested.
2-Wire Interface AC Characteristics
SYMBOL
PARAMETER
fSCL
Scl Clock Frequency
tIN
(Note 11)
tAA
(Note 11)
tBUF
(Note 11)
tLOW
tHIGH
tSU:STA
tHD:STA
Pulse Width Suppression Time At
Inputs
Scl Low To Sda Data Out Valid
Time The Bus Free Before Start Of New
Transmission
Clock Low Time
Clock High Time
Start Condition Setup Time
Start Condition Hold Time
TEST CONDITIONS
MIN
TYP
See Table 2-Wire Interface Test 1 (Note 10)
Conditions on page 5
MAX
400
UNITS
kHz
(Figure 1, 2 and 3)
50
ns
900
ns
1300
ns
1.3
1200
µs
(Note 10)
0.6
1200
µs
(Note 10)
600
ns
600
ns
4
FN8215.2
February 25, 2008