ISL12029_10 Datasheet, PDF (26/30 Pages) Intersil Corporation – Real Time Clock/Calendar with I2C Bus™ and EEPROM

ISL12029, ISL12029A
TABLE 11. I²C, LV RESET, AND BATTERY BACKUP OPERATION SUMMARY (SHADED ROW IS SAME AS X1228 OPERATION)
MODE
SBIB
BIT
BSW
BIT
V_BAT
SWITCHOVER
VOLTAGE
I²C ACTIVE IN EE PROM WRITE/
BATTERY READ IN BATTERY
BACKUP?
BACKUP?
FREQ/IRQ
ACTIVE?
NOTES
A
0
B
0
(X1228
mode)
C
1
D
1
0
Standard Mode,
NO
V_TRIP = 2.2V typ
Default for
ISL12029A
1
Legacy Mode, YES, only if
V_DD < V_BAT
Default for
V_BAT > V_RESET
ISL12029
0
Standard Mode,
NO
V_TRIP = 2.2V typ
1
Legacy Mode,
NO
V_DD < V_BAT
NO
YES
NO
NO
YES
YES
YES
YES
Operation of I²C bus down to
V_DD = V_RESET, then below that no
communications. Battery switchover
at V_TRIP.
Operation of I²C bus into battery
backup mode, but only for
V_BAT > V_DD > V_RESET.
Bus must have pull-ups to V_BAT. No
nonvolatile writes with V_BAT>V_DD
Operation of I²C bus down to
V_DD = V_RESET, then below that no
communications. Battery switchover
at V_TRIP.
Operation of I²C bus down to V_RESET
or V_BAT, whichever is higher.
V_DD
V_BAT (3.0V)
V_RESET (2.63V)
V_TRIP
(2.2V)
tPURST
RESET
I_BAT
I²C BUS ACTIVE
(V_DD POWER, V_BAT NOT CONNECTED)
FIGURE 29. EXAMPLE RESET OPERATION IN MODE A OR C
(BATTERY BACKUP MODE)
26
FN6206.9
August 12, 2010