ISL12029_10 Datasheet, PDF (24/30 Pages) Intersil Corporation – Real Time Clock/Calendar with I2C Bus™ and EEPROM

ISL12029, ISL12029A
PARAMETER
Frequency
Frequency Tolerance
Turnover-Temperature
Operating Temperature Range
Parallel Load Capacitance
Equivalent Series Resistance
TABLE 9. CRYSTAL PARAMETERS REQUIRED FOR INTERSIL RTCs
MIN
TYP
MAX
UNITS
NOTES
32.768
kHz
±100
ppm
Down to 20ppm if desired
20
25
30
°C
Typically the value used for most crystals
-40
85
°C
12.5
pF
50
kΩ
For best oscillator performance
MANUFACTURER
Citizen
Epson
Raltron
SaRonix
Ecliptek
ECS
Fox
TABLE 10. CRYSTAL MANUFACTURERS
PART NUMBER
CM201, CM202, CM200S
MC-405, MC-406
RSM-200S-A or B
32S12A or B
ECPSM29T-32.768K
ECX-306/ECX-306I
FSM-327
TEMP RANGE
(°C)
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-10 to +60
-10 to +60
-40 to +85
+25°C FREQUENCY
TOLERANCE
(ppm)
±20
±20
±20
±20
±20
±20
±20
A final application for the ATR control is in-circuit calibration
for high accuracy applications, along with a temperature
sensor chip. Once the RTC circuit is powered up with battery
backup, the IRQ/F_OUT output is set at 32.768kHz and
frequency drift is measured. The ATR control is then
adjusted to a setting which minimizes drift. Once adjusted at
a particular temperature, it is possible to adjust at other
discrete temperatures for minimal overall drift, and store the
resulting settings in the EEPROM. Extremely low overall
temperature drift is possible with this method. The Intersil
evaluation board contains the circuitry necessary to
implement this control.
Layout Considerations
The crystal input at X1 has a very high impedance and will
pick up high frequency signals from other circuits on the
board. Since the X2 pin is tied to the other side of the crystal,
it is also a sensitive node. These signals can couple into the
oscillator circuit and produce double clocking or misclocking,
seriously affecting the accuracy of the RTC. Care needs to
be taken in layout of the RTC circuit to avoid noise pickup.
Figure 27 shows a suggested layout for the ISL12029
device.
CC11
0.1µF
0.1µF
XTAL_XTAL1
32.768kGz
32.768kGz
R1R11100kk
U^U1¹
IS_XL₁1₂2₂0₈29
FIGURE 27. SUGGESTED LAYOUT FOR INTERSIL RTC IN
SO-14
The X1 and X2 connections to the crystal are to be kept as
short as possible. A thick ground trace around the crystal is
advised to minimize noise intrusion, but ground near the X1
and X2 pins should be avoided as it will add to the load
capacitance at those pins. Keep in mind these guidelines for
other PCB layers in the vicinity of the RTC device. A small
decoupling capacitor at the V_DD pin of the chip is mandatory,
with a solid connection to ground.
For other RTC products, the same rules stated above should
be observed, but adjusted slightly since the packages and
pinouts are slightly different.
24
FN6206.9
August 12, 2010