ISL6308 Datasheet, PDF (25/27 Pages) Intersil Corporation – Three-Phase Buck PWM Controller with High Current Integrated MOSFET Drivers

ISL6308
0.6
0.4
0.2
I_L,PP = 0
I_L,PP = 0.5 I_O
I_L,PP = 0.75 I_O
0
0
0.2
0.4
0.6
0.8
1.0
DUTY CYCLE (V_IN/V_O)
FIGURE 26. NORMALIZED INPUT-CAPACITOR RMS
CURRENT FOR SINGLE-PHASE CONVERTER
Low ESL, high-frequency ceramic capacitors are needed in
addition to the input bulk capacitors to suppress leading and
falling edge voltage spikes. The spikes result from the high
current slew rate produced by the upper MOSFET turn on
and off. Place them as close as possible to each upper
MOSFET drain to minimize board parasitics and maximize
suppression.
Layout Considerations
MOSFETs switch very fast and efficiently. The speed with
which the current transitions from one device to another
causes voltage spikes across the interconnecting
impedances and parasitic circuit elements. These voltage
spikes can degrade efficiency, radiate noise into the circuit
and lead to device overvoltage stress. Careful component
layout and printed circuit design minimizes the voltage
spikes in the converter. Consider, as an example, the turnoff
transition of the upper PWM MOSFET. Prior to turnoff, the
upper MOSFET was carrying channel current. During the
turnoff, current stops flowing in the upper MOSFET and is
picked up by the lower MOSFET. Any inductance in the
switched current path generates a large voltage spike during
the switching interval. Careful component selection, tight
layout of the critical components, and short, wide circuit
traces minimize the magnitude of voltage spikes.
There are two sets of critical components in a DC/DC
converter using a ISL6308 controller. The power
components are the most critical because they switch large
amounts of energy. Next are small signal components that
connect to sensitive nodes or supply critical bypassing
current and signal coupling.
It is important to have a symmetrical layout, preferably with
the controller equidistantly located from the three power
trains it controls. Equally important are the gate drive lines
(UGATE, LGATE, PHASE): since they drive the power train
MOSFETs using short, high current pulses, it is important to
size them as large and as short as possible to reduce their
overall impedance and inductance. Extra care should be
given to the LGATE traces in particular since keeping the
impedance and inductance of these traces helps to
significantly reduce the possibility of shoot-through.
Equidistant placement of the controller to the three power
trains also helps to keep these traces equally short (equal
impedances, resulting in similar driving of both sets of
MOSFETs).
The power components should be placed first. Locate the
input capacitors close to the power switches. Minimize the
length of the connections between the input capacitors, CIN,
and the power switches. Locate the output inductors and
output capacitors between the MOSFETs and the load.
Locate the high-frequency decoupling capacitors (ceramic)
as close as practicable to the decoupling target, making use
of the shortest connection paths to any internal planes, such
as vias to GND immediately next, or even onto the capacitor
solder pad.
The critical small components include the bypass capacitors
for VCC and PVCC. Locate the bypass capacitors, CBP,
close to the device. It is especially important to locate the
components associated with the feedback circuit close to
their respective controller pins, since they belong to a high-
impedance circuit loop, sensitive to EMI pick-up. It is also
important to place current sense components close to their
respective pins on the ISL6308, including the RISEN
resistors, RS, RCOMP, CCOMP. For proper current sharing
route three separate symmetrical as possible traces from the
corresponding phase node for each RISEN.
A multi-layer printed circuit board is recommended. Figure 27
shows the connections of the critical components for the
converter. Note that capacitors C_xxIN and C_xxOUT could
each represent numerous physical capacitors. Dedicate one
solid layer, usually the one underneath the component side
of the board, for a ground plane and make all critical
component ground connections with vias to this layer.
Dedicate another solid layer as a power plane and break this
plane into smaller islands of common voltage levels. Keep
the metal runs from the PHASE terminal to inductor L_OUT
short. The power plane should support the input power and
output power nodes. Use copper filled polygons on the top
and bottom circuit layers for the phase nodes. Use the
remaining printed circuit layers for small signal wiring. The
wiring traces from the IC to the MOSFETs’ gates and
sources should be sized to carry at least one ampere of
current (0.02” to 0.05”).
25
FN9208.2
October 19, 2005