ISL6308 Datasheet, PDF (18/27 Pages) Intersil Corporation – Three-Phase Buck PWM Controller with High Current Integrated MOSFET Drivers

ISL6308
LOWER MOSFET POWER CALCULATION
The calculation for the approximate power loss in the lower
MOSFET can be simplified, since virtually all of the loss in
the lower MOSFET is due to current conducted through the
channel resistance (r_DS(ON)). In Equation 14, I_M is the
maximum continuous output current, I_PP is the peak-to-peak
inductor current (see Equation 1), and d is the duty cycle
(V_OUT/V_IN).
P_{LOW, 1}
=
r_D
·
S(O
N
)
⋅



-I-^M---
N
2
⋅
(
1
–
d
)
+
I--_L---,---^2P_----P-----⋅_---(_--1-----–_-----d----)
12
(EQ. 14)
An additional term can be added to the lower-MOSFET loss
equation to account for additional loss accrued during the
dead time when inductor current is flowing through the
lower-MOSFET body diode. This term is dependent on the
diode forward voltage at I_M, V_D(ON), the switching
frequency, F_SW, and the length of dead times, t_d1 and t_d2, at
the beginning and the end of the lower-MOSFET conduction
interval respectively.
P_{LOW, 2} = V_D(ON) ⋅ F_SW ⋅


-I-^M---
N
+
-I-^P-2---^P--_
⋅
t_d1
+


-I-^M---
N
–
I--_{P-2---P--}
⋅
t_d2
(EQ. 15)
The total maximum power dissipated in each lower MOSFET
is approximated by the summation of P_LOW,1 and P_LOW,2.
UPPER MOSFET POWER CALCULATION
In addition to r_DS(ON) losses, a large portion of the upper-
MOSFET losses are due to currents conducted across the
input voltage (V_IN) during switching. Since a substantially
higher portion of the upper-MOSFET losses are dependent
on switching frequency, the power calculation is more
complex. Upper MOSFET losses can be divided into
separate components involving the upper-MOSFET
switching times, the lower-MOSFET body-diode reverse-
recovery charge, Q_rr, and the upper MOSFET r_DS(ON)
conduction loss.
When the upper MOSFET turns off, the lower MOSFET does
not conduct any portion of the inductor current until the
voltage at the phase node falls below ground. Once the
lower MOSFET begins conducting, the current in the upper
MOSFET falls to zero as the current in the lower MOSFET
ramps up to assume the full inductor current. In Equation 16,
the required time for this commutation is t₁ and the
approximated associated power loss is P_UP,1.
P _{U P,1}
≈
V_IN
⋅


I--_M---
N
+
I--_{P-2---P--}
⋅


t--_1--


 ²ï£¸
⋅
F_SW
(EQ. 16)
At turn on, the upper MOSFET begins to conduct and this
transition occurs over a time t₂. In Equation 17, the
approximate power loss is P_UP,2.
P_{UP, 2}
≈
V_IN
⋅


I--_M---
N
–
I--_{P--2--P--}
⋅



t--_2--


2_
⋅
F_SW
(EQ. 17)
A third component involves the lower MOSFET reverse-
recovery charge, Q_rr. Since the inductor current has fully
commutated to the upper MOSFET before the lower-
MOSFET body diode can recover all of Q_rr, it is conducted
through the upper MOSFET across V_IN. The power
dissipated as a result is P_UP,3.
P_UP,3 = V_IN ⋅ Q_rr ⋅ F_SW
(EQ. 18)
Finally, the resistive part of the upper MOSFET is given in
Equation 19 as P_UP,4.
P_UP,4 ≈ r_DS(ON) ⋅


-I-^M---
2
⋅
d
+
I--_P----P--²_-
 N
12
(EQ. 19)
The total power dissipated by the upper MOSFET at full load
can now be approximated as the summation of the results
from Equations 16, 17, 18 and 19. Since the power
equations depend on MOSFET parameters, choosing the
correct MOSFETs can be an iterative process involving
repetitive solutions to the loss equations for different
MOSFETs and different switching frequencies.
Package Power Dissipation
When choosing MOSFETs it is important to consider the
amount of power being dissipated in the integrated drivers
located in the controller. Since there are a total of three
drivers in the controller package, the total power dissipated
by all three drivers must be less than the maximum
allowable power dissipation for the QFN package.
Calculating the power dissipation in the drivers for a desired
application is critical to ensure safe operation. Exceeding the
maximum allowable power dissipation level will push the IC
beyond the maximum recommended operating junction
temperature of 125°C. The maximum allowable IC power
dissipation for the 6x6 QFN package is approximately 4W at
room temperature. See Layout Considerations paragraph for
thermal transfer improvement suggestions.
When designing the ISL6308 into an application, it is
recommended that the following calculation is used to
ensure safe operation at the desired frequency for the
selected MOSFETs. The total gate drive power losses,
P_{Qg_TOT}, due to the gate charge of MOSFETs and the
integrated driver’s internal circuitry and their corresponding
average driver current can be estimated with Equations 20
and 21, respectively.
18
FN9208.2
October 19, 2005