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ISL5216_05 Datasheet, PDF (25/65 Pages) Intersil Corporation – Four-Channel Programmable Digital DownConverter
ISL5216
In dB, this can be expressed as:
(AGC Mult/Shift Gain)dB = 20 log10(2N[1 + (X)2-14])
The full AGC range of the multiplier / shifter is from 0dB to
20log 10 [1+(2 14 -1)2 -14 ] + 20log 10 [2 15 ] = 96.329dB.
The 16 bit resolution of the mantissa provides a theoretical
AM modulation level of -96dBc (depending on loop gain,
settling mode and SNR). This effectively eliminates AM
spurious components caused by the AGC resolution.
The Cartesian to polar coordinate converter accepts I and Q
data and generates magnitude and phase data. The
magnitude output is determined by the equation:
r = 1.64676 I2 + Q2
where the magnitude limits are determined by the maximum
I and Q signal levels into the Cartesian to polar converter.
Taking fractional 2's complement representation, magnitude
ranges from 0 to 2.329, where the maximum output is
r = 1.64676 12 + 12 = 1.64676x1.414 = 2.329
The AGC loop feedback path consists of an error detector,
error scaling, and an AGC loop filter. The error detector
subtracts the magnitude output of the coordinate converter
from the programmable AGC THRESHOLD value. The AGC
THRESHOLD value is set in IWA register *012h and is equal
to 1.64676 times the desired magnitude of the I1/Q1 output.
Note that the MSB is always zero. The range of the AGC
THRESHOLD value is 0 to +3.9999. The AGC Error Detector
output has the identical range.
The loop gain register values adjust the response / settling
time of the AGC loop. The loop gain is set in the AGC Error
Scaling circuitry, using four values in two sets of
programmable mantissa and exponent pairs (see IWA
register *010h). Each set has both an attack and a decay
gain. This allows asymmetric adjustment for applications
such as VOX systems where the signal turns on and off. In
these applications, the gains would be set for fast attack and
slow decay so that the part decreases the gain quickly when
the signal turns on, but increases the gain slowly when the
signal turns off (in anticipation of it turning back on shortly).
For fixed gains, either set the upper and lower AGC limits to
the same value, or set the limits to minimum and maximum
gains and set the AGC attack and decay loop gains to zero.
The mantissa, M, is a 4-bit value which weights the loop filter
input from 0.0 to 15 / 24 = 0.9375. The exponent, E, defines
a shift factor that provides additional weighting from 20 to
2-15. Together the mantissa and exponent define the loop
gain as given by,
AGC Loop Gain = MLG 2-4 2-(15-ELG)
where M LG is a 4-bit binary mantissa value ranging from 0
to 15, and E LG is a 4-bit binary exponent value ranging from
0 to 15. The composite (shifter and multiplier) AGC scaling
Gain range is from 0.0000 to 2.329(0.9375)20 = 0.0000 to
2.18344. The scaled gain error can range (depending on
threshold) from 0 to 2.18344, which maps to a “gain change
per sample” range of 0 to 3.275dB / sample.
The AGC attack and decay gain mantissa and exponent values
for loop gains 0 and 1 are programmed into IWA register *010h.
The PDC provides for the storing of two values of AGC attack
and decay scaling gains to allow for quick adjustment of the
loop gain by simply setting IWA register *013h bits 9 and 10
accordingly. Possible applications include acquisition / tracking,
no burst present / burst present, strong signal / weak signal,
track / hold, or fast / slow AGC values.
The AGC loop filter consists of an accumulator with a built in
limiting function. The maximum and minimum AGC gain
limits are provided to keep the gain within a specified range
and are programmed by 16-bit upper and lower limits using
the following the equation:
AGC Gain Limit = (1 + mAGC 2-12) 2e
(AGC Gain Limit)dB = (6.02)(eeee) + 20 log(1.0+0.mmmm
mmmm mmmm)
where m is a 12-bit mantissa value between 0 and 4095, and
e is the 4-bit exponent ranging from 0 to 15. IWA register
*011h Bits 31:16 are used for programming the upper limit,
while bits 15:0 are used to program the lower limit. The
format for these limit values are:
(31:16) or (15:0): E E E E M M M M M M M M M M M M
for a gain of 0 1. M M M M M M M M M M M M * 2 E E E E
and the possible range of AGC limits from the previous
equations is 0 to 96.328dB. The bit weightings for the AGC
Loop Feedback elements are detailed in Table 55.
Using AGC loop gain, the AGC range, and expected error
detector output, the gain adjustments per output sample for
the loop filter section of the digital AGC can be given by
AGC Slew Rate = (1.5 dB) (THRESHOLD - (MAG *
1.64676)) x (MLG) (2-4) (2-(15 - ELG))
The loop gain determines the growth rate of the sum in the
loop accumulator which, in turn, determines how quickly the
AGC gain scales the output to the threshold value. Since the
log of the gain response is roughly linear, the loop response
can be approximated by multiplying the maximum AGC gain
error by the loop gain. The expected range for the AGC rate
is ~ 0.000106 to 3.275dB / output sample time for a
threshold of 1/2 scale. For a full scale error, the minimum
non-zero AGC slew rate would be approximately 0.0002dB /
output or 20dB / sec at 100ksps. The maximum gain would
be 6dB / output. This much gain, however, would probably
result in significant AM on the output.
The maximum AGC Response is given by:
AGC ResponseMax = (Input)(Cart/Polar Gain)(Error Det.
Gain)(AGC Loop Gain)(AGC Output Weighting)
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July 8, 2005