ISL5216_05 Datasheet, PDF (24/65 Pages) Intersil Corporation – Four-Channel Programmable Digital DownConverter

ISL5216
24-bit programmable FIR filter output into the range of 20-bit
and shorter words in the output section. Without gain control,
a signal at -72dBFS = 20log ₁₀ (2 ^-12 ) at the input would have
only 4 bits of resolution at the output if a 16 bit word length
were to be used (12 bits less than the full scale 16 bits). The
potential increase in the bit resolution due to processing gain
of the filters can be lost without the use of the AGC.
Figure 4 shows the Block Diagram for the AGC Section. The
FIR filter data output is routed to the Cartesian to polar
coordinate converter after passing through the AGC
multipliers and shift registers. The magnitude output of the
Cartesian to polar coordinate converter is routed through the
AGC error detector, the AGC error scaler and into the AGC
loop filter. This filtered error term is used to drive the AGC
multiplier and shifters, completing the AGC control loop.
The AGC multiplier / shifter portion of the AGC is identified in
Figure 4. The gain control from the AGC loop filter is
sampled when new data enters the multiplier / shifter. The
limit detector detects overflow in the shifter or the multiplier
and saturates the output of I and Q data paths
independently. The shifter has a gain from 0 to 90.31dB in
6.021dB steps, where 90.31dB = 20log ₁₀ (2 ^N ) when
N = 15. The mantissa provides up to an additional 6.02dB of
gain. The gain in dB from the mantissa is:
20log ₁₀ [1+(X)2 ^-14], where X is the fractional part of the
mantissa interpreted as an unsigned integer ranging from 0
to 2¹⁴ - 1.
Thus, the AGC multiplier / shifter transfer function is
expressed as:
AGC Mult/Shift Gain = 2^N [1+ (X)2^-14]
where N, the shifter exponent, has a range of 0<N<15 and X,
the mantissa, has a range of 0<X<(2 ¹⁴ -1).
SERIAL
19
OUT
16
µP
(11 MANTISSA
4 EXPONENT)
AGC LOOP FILTER
µP
AGC ERROR SCALING
(RANGE = -2.18344 TO 2.18344)
MSB = 0
M
U
+
X
MSB = 0
EN AGC
LOAD
LIMIT
DET
UPPER LIMIT †
LOWER LIMIT †
28
EXP 4
AGCGNSEL
MANTISSA
4
AGC
ERROR
DETECTOR
16
∆
18
24
IFIR
24
QFIR
4 _EXP=2NNNN
16 MANTISSA =
01.XXXXXXXXXXXXXX
LIMIT
DET
24
24
24
IAGC
LIMIT
DET
24
QAGC
MAGNITUDE
(RANGE = 0 TO 2.32887)
16
(RANGE = 0 TO 1)
CARTESIAN
TO
POLAR
COORDINATE
CONVERTER
(G = 1.64676)
AGC MULTIPLIER/SHIFTER
† Controlled via microprocessor interface.
FIGURE 4. AGC FUNCTIONAL BLOCK DIAGRAM
24
July 8, 2005