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ISL70517SEH Datasheet, PDF (23/27 Pages) Intersil Corporation – Precision test and measurement
ISL70517SEH
Driving an ADC
The output feedback loop is closed by the connection of VOUT to
the +VFB pin. The VREF pin is just an input to a very low bias
current terminal and would be connected to a mid-scale voltage
when driving a single supply ADC, such that the input would have
a ± input signal span. Where VREF is connected to the ADC
ground, only positive inputs would be converted by the ADC.
Input and Feedback Amplifiers
The input and the output linear dynamic ranges are set by class-A
biasing on the RIN resistor for the input stage and the RFB resistor
for the output stage (Figure 48). Unity gain buffers force the
differential voltages across each resistor to the maximum of
100µA*R produced by the current sources. While the voltages
impressed across these resistors will continue to move with
overloads beyond this value, they will not be linear. A good rule of
thumb is to keep the maximum linear dynamic range to less than
~80% of the maximum I*R voltage across the resistors.
At equilibrium, the amplifier forces the resistor currents to be the
same so that their voltages match the desired gain ratio,
RFB/RIN; however, during transient conditions the currents
remain unequal until the amplifier output settles. For this reason,
the current sources driving the feedback resistor are 20% higher
than those driving the input GM resistor to provide an extra
margin.
Rail-to-Rail Output Stage
The output stage is of rail-to-rail design and has separate
supplies from the rest of the IC. The input GM stage and
feedback amplifiers are driven from the VCC and VEE supply pins
and only the output stage is powered by the VCO and VEO pins. A
typical supply arrangement when driving a 5V ADC is to have VCO
connected to the ADC +5V supply and VEO to ground. Therefore,
the ADC can never be overdriven beyond its supply rails. In this
configuration, the common-mode input range of the feedback
amplifier limits the dynamic range of the output stage. The input
and feedback amplifiers are not rail-to-rail, so the VCC must be
more positive than VCO and VEE more negative than VEO by the
feedback amplifier saturation voltage (±3V).
DC Offsets and Noise
There are three offset and noise sources in the ISL70517SEH:
the input, feedback, and IERR. The input has a low input noise
voltage and offset, which dominates at gains ~30 and above. The
feedback GM stage has similar errors, but is never dominant
compared to IERR and is generally ignored. IERR can be thought of
as the mistracking and noise of the internal 100µA current
sources. Use Equation 19 and quantify these errors at the output
(RTO).
VOSRTO= VOSINGain + IERRRFB+VOS(FB)
(EQ. 19)
Similarly, Equation 20 for noise:
V N  RTO  2 =

V
N
I
N

G
a
i
n
2
+

In

e
r
r

RF
B
2

(EQ. 20)
Reducing RFB to the minimum value required for linear output
swing will improve output offsets and noise directly.
Another result of scaling RFB is that the -3dB bandwidth is also
inversely scaled. Highest bandwidth will then be available at
lowest Rf. The ISL70517SEH is designed to be stable with
RFB = 30.1kΩ minimum.
Having set RFB to establish the output range, RIN is set to
establish Gain = RFB/RIN. While -3dB bandwidth does diminish
for RIN < 500Ω, this still allows fairly constant bandwidth over a
wide variety of gains. Similar to the resistor-oriented op amp
topology, parasitic capacitance at the RFB node will peak the
frequency response. The ISL70517SEH is designed to be tolerant
to parasitic capacitances at RFB from values of 2pF to 20pF. The
input stage is more tolerant, allowing 2pF to 30pF. Electronic
analog switches can be used to alter RIN selections for gain
switching, as long as the minimum RFB halves are connected to
the RIN pins directly, with the switch(es) in between the halves.
This following switch example (see Figure 52) is a practical way
to isolate switch parasitic capacitances from the RIN pins:
+RIN
R0
2.5k
S0
R1
2.5k
-RIN
S1
+RINSENSE
R3
KELVIN
45k
CONTACT
S3
R2
15k
-RINSENSE
S2
KELVIN
CONTACT
R4
95k
FIGURE 52. SWITCH EXAMPLE
The RFB and RIN resistors are provided with Kelvin sense pins to
minimize interconnect resistance errors. This is especially useful
at high gains and small RIN.
Amplifier Usage Examples
The external resistors, RFB and RIN, set both the voltage gain and
the linear output voltage range. The linear output voltage range
is the maximum differential signal that can appear at the output
and is different from the common-mode range. The voltage gain
is shown in Equation 21.
AV = RFB  RIN
(EQ. 21)
Linear output voltage range is shown in Equation 22.
VO(LIN) = ±RFB  IRIN
(EQ. 22)
where IRFB is nominally set to 80% of IRIN.
For example, an application requiring a voltage gain of 100 and a
linear output range of ±2.5V might select a 30kΩ feedback
resistor and a 300Ω input resistor to ensure linear operation
throughout the required output span. The output offset voltage in
Table 3 on page 22 shows a few standard gain configurations
and linear output spans with appropriately sized resistors.
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FN8699.4
December 15, 2016