ISL70517SEH Datasheet, PDF (19/27 Pages) Intersil Corporation – Precision test and measurement

ISL70517SEH
In cases where large pulse overshoot is expected, the maximum
current in Equation 8 on page 18 could be reduced to 50% for
additional margin (see “AC Performance Considerations” on
page 20). The penalty for increasing the feedback resistor value
is higher DC offset voltage and noise.
Output voltages that exceed the maximum dynamic range of the
feedback amplifier can degrade phase margin and cause
instability. The plot in Figure 49 shows the maximum differential
output voltage swing vs resistor value for R_FB and R_IN using the
80% and 50% current source levels.
35
30
25
V_OUT (V) AT 80%
20
15
10
V_OUT (V) AT 50%
5
00
50 100 150 200 250 300 350 400
R_FB, R_IN VALUE (kΩ)
FIGURE 49. R_FB, R_IN vs DYNAMIC RANGE
Setting the Input Gain Resistor (R_IN)
The input gain resistor (R_IN) is scaled to the feedback resistor
according to the gain in (Equation 9):
R_IN= R_FB  Gain
(EQ. 9)
The input G_M stage uses the same differential current source
arrangement as the feedback stage. Therefore, the amount of
overdrive margin (50% to 80%) included in the calculation for R_FB
is also included in the calculation for R_IN (refer to Figures 48 and
49).
Input Stage Overdrive Considerations
There are a few cases where the input stage can be overdriven,
which must be considered in the application. An input signal that
exceeds the maximum dynamic range of the gain resistor R_IN,
calculated previously, can cause the ESD diodes to conduct.
When this occurs, a low impedance path from the inputs to the
input gain resistor R_IN will result in signal distortion (refer to
Figure 50).
High-speed input signals that remain within the maximum
dynamic range of the input stage can cause distortion if the input
slew rate exceeds the input stage slew rate (~4V/µs). When the
input slews at a faster rate than the G_M stage can follow, the
voltage difference appears across the input ESD diodes from
each input and resistor R_IN. When the voltage difference is large
enough to cause the diodes to conduct, the input terminals are
shunted to R_IN through the 500Ω input protection resistors,
causing distortion during the rise and fall times of the transient
pulse. The distortion will last until the resistor voltage catches up
to the input voltage.
IN- ^500Ω
500Ω
IN+
ESD
PROTECTION
V_CC
+
-A1
Q1 Q2
R_IN
+
A2-
100µA 100µA
ESD
PROTECTION
V_EE
FIGURE 50. INPUT STAGE ESD PROTECTION DIODES
Setting the Power Supply Voltages
The ISL70517SEH power supplies are partitioned so that the
input stage and feedback stages are powered from a separate
pair of supply pins (V_CC, V_EE) than the differential output stage
(V_CO, V_EO). This partitioning provides the user with the ability to
adapt the ISL70517SEH to a wide variety of input signal power
sources that would not be possible if the supplies were strapped
together internally (V_CC = V_CO and V_EE = V_EO). However, powering
the input and output supplies from unequal supplies has
restrictions that are described in the next section.
Powering the Input and Feedback Stages
(V_CC, V_EE)
The input pins IN+, IN- cannot swing rail-to-rail, but have a
maximum input voltage range given by Equation 10:
V_EE + 3V≤V_CMIRIN + V_IN≤ V_CC – 3V;
where V_IN = maximum differential voltage IN+ to IN-
(EQ. 10)
This requires the sum of the common-mode input voltage and
the differential input voltage to remain within 3V of either the V_CC
or V_EE rail, otherwise distortion will result.
The feedback pins V_FB+ and V_FB- have the same input
common-mode voltage constraint as the input pins IN+, IN-. The
maximum input voltage range of the feedback pins is given by
Equation 11:
V_EE + 3V≤V_CMIRFB≤ V_CC – 3V
(EQ. 11)
where V_CMIRFB = V_OUT + V_REF
To maintain stability, it is critical to respect the ±3V requirement
in Equation 11.
Powering the Rail-to-Rail Output Stage
(V_CO, V_EO)
The output stage (A6) is of rail-to-rail design and is powered by
the V_CO and V_EO pins. The differential output pins +V_OUT, -V_OUT
connect to the V_FB+, V_FB- pins to close the output feedback loop.
The feedback stage is powered from V_CC and V_EE pins. The V_FB+,
V_FB- have a common-mode input range 3V below the V_CC rail and
3V above the V_EE rail. If the output voltage exceeds the feedback
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FN8699.4
December 15, 2016