ISL78236 Datasheet, PDF (22/24 Pages) Intersil Corporation – Dual 3A Current Sharing 2.5MHz High Efficiency Synchronous Buck Regulator

ISL78236
Thermal Performance
Delivering a full load output current of 6A across the ambient
operating temperature is strongly dependent on the thermal
characteristic of the PCB layout. The power dissipation of the IC
and the thermal impedance of the board will result in a
temperature gradient between ambient and junction. Power
dissipation curves for typical application can be found in
Figures 7 and 8 for dual output operation and Figures 37 and 38
for current sharing operation. If the junction temperature
exceeds the +150°C over-temperature protection threshold the
regulator will be disabled.
The theta JA (_JA) spec shown in the “Thermal Information” on
page 8 is based upon JEDEC standard JESD51-5. However, real
world application boards will differ from the JEDEC standard thus
producing different theta JA results. For example, the JESD51-5
specifies the thermal attach pad via only to the top buried layer.
Most practical applications will have the via connect to all layers
of the PCB board ground plane. JESD51-5 also requires that
buried planes use 1 oz. copper while the outer planes use 2 oz.
copper. It is recommended to have 2 oz. or greater copper on all
layers in application boards.
It is essential to have the package thermal pad connected to a
top layer PCB ground pad with the via connecting to additional
ground planes. This is where most of the thermal relief will occur.
The four PGND pins of the ISL78236 should be connected to the
thermal pad also. These connections provide the extra thermal
relief to minimize theta JA allowing the ISL78236 to maintain full
output current up to +105°C. See Figure 52 for an example
layout of the thermal relief pad.
PIN 1
24 23 22 21 20 19
LX2 1
18 LX1
VIN2 2
17 VIN1
VIN2 3
EN2 ₄
25
PAD
16 ^VIN1
15 VDD
PG2 5
14 SS
FB2 6
13 EN1
7 8 9 10 11 12
FIGURE 52. RECOMMENDED THERMAL PAD LAYOUT
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April 28, 2014