ISL78236 Datasheet, PDF (20/24 Pages) Intersil Corporation – Dual 3A Current Sharing 2.5MHz High Efficiency Synchronous Buck Regulator

ISL78236
ISL78236 uses an internal compensation network and the output
capacitor value is dependent on the output voltage. The ceramic
capacitor is recommended to be X5R or X7R. The recommended
minimum output capacitor values for the ISL78236 are shown in
Table 3.
TABLE 3. MINIMUM OUTPUT CAPACITOR VALUE vs V_OUT
V_OUT
C_OUT
L
(V)
(µF)
(µH)
1.2
2 x 22
0.5~1.1
1.6
2 x 22
0.5~1.1
1.8
2 x 22
0.5~1.68
2.5
2 x 22
0.5~1.68
3.3
2 x 6.8
0.5~2.2
3.6
10
0.5~2.2
In Table 3, the minimum output capacitor value is given for
different output voltages to make sure the converter system is
stable.
While ceramic capacitors offer excellent overall performance
and reliability, the actual in-circuit capacitance must be
considered. Ceramic capacitors are rated using large
peak-to-peak voltage swings and with no DC bias. In the DC/DC
converter application, these conditions do not reflect reality. As a
result, the actual capacitance may be considerably lower than
the advertised value. Consult the manufacturers data sheet to
determine the actual in-application capacitance. Most
manufacturers publish capacitance vs DC bias so that this effect
can be easily accommodated. The effects of AC voltage are not
frequently published, but an assumption of ~20% further
reduction will generally suffice. The result of these
considerations may mean an effective capacitance 50% lower
than nominal and this value should be used in all design
calculations. Nonetheless, ceramic capacitors are a very good
choice in many applications due to their reliability and extremely
low ESR.
Equations 4 and 5 allow calculation of the required capacitance
to meet a desired ripple voltage level. Additional capacitance
may be used.
For the ceramic capacitors (low ESR):
V_OUTripple= -₈---_---_F----_S----_W--^---_-^I---_C----_O-----_U----_T-
(EQ. 4)
where I is the inductor’s peak-to-peak ripple current, F_SW is the
switching frequency and C_OUT is the output capacitor.
If using electrolytic capacitors then:
V_OUTripple= I*ESR
(EQ. 5)
Output Voltage Selection
The output voltage of the regulator can be programmed via an
external resistor divider, which is used to scale the output voltage
relative to the internal reference voltage and feed it back to the
inverting input of the error amplifier. Refer to Figures 3 and 4.
The output voltage programming resistor, R₂ (or R₅ in
Channel 2), will depend on the desired output voltage of the
regulator. The value for the feedback resistor is typically between
50k and 312.5k. Setting R₂ and V_OUT, R₃ will be:
R₃
=
------^R----²----^x---⁰----^.-⁸----^V--------
V_OUT – 0.8V
(EQ. 6)
For better performance, add 12pF in parallel with R₂ (or R₅) for
faster transient response
Minimum Output Voltage
The ISL78236 switching frequency F_S (2.5MHz typical,
2.85MHz max) and the minimum LX pin ON Time (140ns, max)
sets a minimum duty cycle of the converter under worst case
scenario of 0.4 across temperature. Because of this minimum
duty cycle, there is an input V_IN to output V_OUT range the
ISL78236 is capable of regulating to. The ratio of output to input
(V_OUT/V_IN) must be higher than 0.4 to maintain output voltage
regulation. For example, it is not recommended to regulate below
2.0V for V_IN = 5V and below 1.2V for V_IN = 3V as the minimum
duty cycle limitation will impact output voltage. Note that when
external synchronization is used, the switching frequency is
higher than 2.85MHz which further restricts the V_OUT/V_IN range
of operation.
Input Capacitor Selection
The main functions for the input capacitor are to provide
decoupling of the parasitic inductance and to provide filtering
function to prevent the switching current flowing back to the
battery rail. One 22µF X5R or X7R ceramic capacitor is a good
starting point for the input capacitor selection per channel.
Loop Compensation Design
When a soft-start capacitor is connected to the SS pin, the COMP
pin is active for external loop compensation. The ISL78236 uses
constant frequency peak current mode control architecture to
achieve a fast loop transient response. An accurate current
sensing pilot device in parallel with the upper MOSFET is used for
peak current control signal and overcurrent protection. The
inductor is not considered as a state variable since its peak
current is constant, and the system becomes a single order
system. It is much easier to design a type II compensator to
stabilize the loop than to implement voltage mode control. Peak
current mode control has an inherent input voltage feed-forward
function to achieve good line regulation. Figure 50 shows the
small signal model of the synchronous buck regulator.
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April 28, 2014