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ISL6568_06 Datasheet, PDF (22/29 Pages) Intersil Corporation – Two-Phase Buck PWM Controller with Integrated MOSFET Drivers for VRM9, VRM10, and AMD Hammer Applications
ISL6568
PVCC
RHI2
RLO2
LGATE
CGD
G
RG2
RGI2
CGS
S
D
CDS
Q2
FIGURE 16. TYPICAL LOWER-GATE DRIVE TURN-ON PATH
The total gate drive power losses are dissipated among the
resistive components along the transition path and in the
bootstrap diode. The portion of the total power dissipated in the
controller itself is the power dissipated in the upper drive path
resistance, PDR_UP, the lower drive path resistance, PDR_UP,
and in the boot strap diode, PBOOT. The rest of the power will
be dissipated by the external gate resistors (RG1 and RG2) and
the internal gate resistors (RGI1 and RGI2) of the MOSFETs.
Figures 15 and 16 show the typical upper and lower gate
drives’ turn-on transition path. The total power dissipation in the
controller itself, PDR, can be roughly estimated as:
PDR = PDR_UP + PDR_LOW + PBOOT + (IQ • VCC) (EQ. 23)
PBOOT
=
-P----Q----g----_--Q-----1-
3
P D R _UP
=



-R----H----I--1--R---+--H--R--I--1-E----X----T---1--
+
R-----L---O-----1R----+-L---O-R----1-E----X----T---1- 
•
P-----Q----g----_--Q-----1-
3
P D R _LOW
=



-R----H----I--2--R---+--H--R--I--2-E----X----T---2--
+
R-----L---O-----2R----+-L---O-R----2-E----X----T---2- 
•
P-----Q----g----_--Q-----2-
2
REXT1
=
RG
1
+
R-----G-----I-1--
NQ1
REXT2
=
RG2
+
R-----G-----I-2--
NQ2
Current Balancing Component Selection
The ISL6568 senses the channel load current by sampling
the voltage across the lower MOSFET rDS(ON), as shown in
Figure 17. The ISEN pins are denoted ISEN1 and ISEN2.
The resistors connected between these pins and the
respective phase nodes determine the gains in the channel-
current balance loop.
VIN
CHANNEL N
UPPER MOSFET
IL
ISL6568
ISEN(n)
RISEN
-
IL rDS(ON)
+
CHANNEL N
LOWER MOSFET
FIGURE 17. ISL6568 INTERNAL AND EXTERNAL CURRENT-
SENSING CIRCUITRY
Select values for these resistors based on the room
temperature rDS(ON) of the lower MOSFETs; the full-load
operating current, IFL; and the number of phases, N using
Equation 24.
RISEN
=
5-r--D-0---S--×--(-1-O--0---N-–--6-)-
-I-F----L-
N
(EQ. 24)
In certain circumstances, it may be necessary to adjust the
value of one or more ISEN resistors. When the components of
one or more channels are inhibited from effectively dissipating
their heat so that the affected channels run hotter than
desired, choose new, smaller values of RISEN for the affected
phases (see the section entitled Channel-Current Balance).
Choose RISEN,2 in proportion to the desired decrease in
temperature rise in order to cause proportionally less current
to flow in the hotter phase.
R I S E N ,2
=
RISEN
∆-----T----2-
∆T1
(EQ. 25)
In Equation 25, make sure that ∆T2 is the desired temperature
rise above the ambient temperature, and ∆T1 is the measured
temperature rise above the ambient temperature. While a
single adjustment according to Equation 25 is usually
sufficient, it may occasionally be necessary to adjust RISEN
two or more times to achieve optimal thermal balance
between all channels.
Load Line Regulation Component Selection (DCR
Current Sensing)
For accurate load line regulation, the ISL6568 senses the
total output current by detecting the voltage across the
output inductor DCR of each channel (As described in the
Load Line Regulation section). As Figure 18 illustrates, an
R-C network is required to accurately sense the inductor
DCR voltage and convert this information into a “droop”
voltage, which is proportional to the total output current.
22
FN9187.4
March 9, 2006