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ISL6568_06 Datasheet, PDF (14/29 Pages) Intersil Corporation – Two-Phase Buck PWM Controller with Integrated MOSFET Drivers for VRM9, VRM10, and AMD Hammer Applications
ISL6568
TABLE 4. VRM10 VOLTAGE IDENTIFICATION CODES (Continued)
VID4 VID3 VID2 VID1 VID0 VID12.5 VDAC
1
0
1
1
1
1
1.2750
1
0
1
1
1
0
1.2875
1
0
1
1
0
1
1.300
1
0
1
1
0
0
1.3125
1
0
1
0
1
1
1.3250
1
0
1
0
1
0
1.3375
1
0
1
0
0
1
1.3500
1
0
1
0
0
0
1.3625
1
0
0
1
1
1
1.3750
1
0
0
1
1
0
1.3875
1
0
0
1
0
1
1.4000
1
0
0
1
0
0
1.4125
1
0
0
0
1
1
1.4250
1
0
0
0
1
0
1.4375
1
0
0
0
0
1
1.4500
1
0
0
0
0
0
1.4625
0
1
1
1
1
1
1.4750
0
1
1
1
1
0
1.4875
0
1
1
1
0
1
1.5000
0
1
1
1
0
0
1.5125
0
1
1
0
1
1
1.5250
0
1
1
0
1
0
1.5375
0
1
1
0
0
1
1.5500
0
1
1
0
0
0
1.5625
0
1
0
1
1
1
1.5750
0
1
0
1
1
0
1.5875
0
1
0
1
0
1
1.6000
Voltage Regulation
In order to regulate the output voltage to a specified level,
the ISL6568 uses the integrating compensation network
shown in Figure 6. This compensation network insures that
the steady-state error in the output voltage is limited only to
the error in the reference voltage (output of the DAC) and
offset errors in the OFS current source, remote-sense and
error amplifiers. Intersil specifies the guaranteed tolerance of
the ISL6568 to include the combined tolerances of each of
these elements.
EXTERNAL CIRCUIT
RC CC COMP
RFB
+
VOFS
-
REF
CREF
FB
VDIFF
ISL6568 INTERNAL CIRCUIT
VID DAC
1k
+
-
VCOMP
ERROR AMPLIFIER
IOFS
+
VOUT
-
VSEN
RGND
+
VDROOP
-
IREF
ICOMP
+
+
-
-
DIFFERENTIAL
REMOTE-SENSE
AMPLIFIER
FIGURE 6. OUTPUT VOLTAGE AND LOAD-LINE
REGULATION WITH OFFSET ADJUSTMENT
The ISL6568 incorporates an internal differential remote-
sense amplifier in the feedback path. The amplifier removes
the voltage error encountered when measuring the output
voltage relative to the controller ground reference point,
resulting in a more accurate means of sensing output
voltage. Connect the microprocessor sense pins to the non-
inverting input, VSEN, and inverting input, RGND, of the
remote-sense amplifier. The droop voltage, VDROOP, also
feeds into the remote-sense amplifier. The remote-sense
output, VDIFF, is therefore equal to the sum of the output
voltage, VOUT, and the droop voltage. VDIFF is connected to
the inverting input of the error amplifier through an external
resistor.
The output of the error amplifier, VCOMP, is compared to the
sawtooth waveform to generate the PWM signals. The PWM
signals control the timing of the Internal MOSFET drivers
and regulate the converter output so that the voltage at FB is
equal to the voltage at REF. This will regulate the output
voltage to be equal to Equation 4. The internal and external
circuitry that controls voltage regulation is illustrated in
Figure 6.
VOUT = VREF – VOFS – VDROOP
(EQ. 4)
14
FN9187.4
March 9, 2006