ISL6263D Datasheet, PDF (2/17 Pages) Intersil Corporation – Pre-biased Output Start-Up Capability

Block Diagram
VDD
VSS
RBIAS
OCSET
ISP
ISN
ICOMP
VO
V_REF
+
1.55V
-

1:1
-
OCP
+
+
-
VR_ON
x2.5
-
SCP
+
+
-
VSEN
+
RTN
-
VDIFF
VID0
VID1
VID2
OFFSET1
OFFSET0
REF
VID DAC
I_SS

I_DVID
+
E/A
-
PGOOD
POR
VREF
PGOOD
SHORT CIRCUIT
OVERCURRENT
UNDERVOLTAGE
OVERVOLTAGE
FAULT LATCH
PWM
CONTROL
DIODE
EMULATION
AUDIBLE
FREQUENCY
FILTER
SEVERE
OVERVOLTAGE
SOFT
CROWBAR
CONTROL
X31


 V_W
20%
>
>


DRIVER
SHOOT-THROUGH
PROTECTION
DRIVER
g_mV_IN ^PWM
V_W
R³
MODULATOR
g_mV_{soft VCOMP}
SOFT
FB
COMP IMON VIN
FIGURE 1. SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM OF THE ISL6263D
BOOT
UGATE
PHASE
PVCC
LGATE
PGND
FDE
AF_EN
VW