ISL24201_14 Datasheet, PDF (2/12 Pages) Intersil Corporation – Programmable VCOM Calibrator with EEPROM

Block Diagram
V_DD
5
ISL24201
A_VDD
2
6
SDA
7
SCL
3
WP
I²C
INTERFACE
DAC
REGISTERS
ANALOG DCP
AND
CURRENT SINK
Q1
8-BIT EEPROM
A1
CURRENT
SINK
ISL24201
4
GND
FIGURE 2. BLOCK DIAGRAM OF THE ISL24201
1
OUT
8
SET
Pin Configuration
ISL24201
(8 LD TDFN)
TOP VIEW
OUT 1
A_VDD 2
WP 3
GND 4
PAD
8 SET
7 SCL
6 SDA
5 VDD
(THERMAL PAD CONNECTS TO GND)
Pin Descriptions
PIN
NAME
OUT
A_VDD
WP
GND
V_DD
SDA
SCL
SET
PAD
PIN
NUMBER
1
2
3
4
5
6
7
8
-
FUNCTION
Adjustable Sink Current Output Pin. The current
sunk into the OUT pin is equal to the DAC setting
times the maximum adjustable sink current
divided by 256. See the “SET” pin function
description below (pin 8) for the maximum
adjustable sink current setting.
High-Voltage Analog Supply. Bypass to GND
with 0.1µF capacitor.
EEPROM Write Protect. Active Low.
0 = Programming disabled;
1 = Programming allowed. This pin has an
internal pull-down current sink
Ground connection.
System power supply input. Bypass to GND
with 0.1µF capacitor.
I²C Serial Data Input and Output
I²C Clock Input
Maximum Sink Current Adjustment Point.
Connect a resistor from SET to GND to set the
maximum adjustable sink current of the OUT
pin. The maximum adjustable sink current is
equal to (A_VDD/20) divided by R_SET.
Thermal pad should be connected to system
ground plane to optimize thermal performance.
2
FN7586.1
December 9, 2010