82C37A_06 Datasheet, PDF (19/24 Pages) Intersil Corporation – CMOS High Performance Programmable DMA Controller

Timing Waveforms
CS
IOW
A0 - A3
DB0 - DB7
TCWL
(43)
TAWL
(42)
82C37A
TWWS
(55)
INPUT VALID
TDW
(44)
INPUT VALID
TWC (53)
TWA (52)
TWD (54)
FIGURE 8. SLAVE MODE WRITE
NOTE: Successive WRITE accesses to the 82C37A must allow at least TCY as recovery time between accesses. A TCY recovery time must be
allowed before executing a WRITE access after a READ access.
CS
A0 - A3
IOR
DB0 -DB7
TAR
(41)
ADDRESS MUST BE VALID
TRW
(51)
TRDE
(46)
TRA (45)
TRDF
(47)
DATA OUT VALID
FIGURE 9. SLAVE MODE READ
NOTE: Successive READ accesses to the 82C37A must allow at least TCY as recovery time between accesses. A TCY recovery time must be
allowed before executing a READ access after a WRITE access.
19
FN2967.2
March 20, 2006