X80000 Datasheet, PDF (18/37 Pages) Intersil Corporation – Smart Power Plug Penta-Power Sequence Controller with Hot Swap

X80000, X80001
system) then cleared by a write to Fault Detection Register.
Please refer to FDR section. See Table 2.
TABLE 3. OVERVOLTAGE/UNDERVOLTAGE FLAG BITS
SYMBOL VIOLATION (ON)
NORMAL (OFF)
FOV
FOV = 0, when
V_UV/OV > V_OV
(Overvoltage)
FOV = 1, when
V_UV/OV < V_OV + 0.2V
and reset by a write operation
FUV1/2 FUV1/2 = 0, when
V_UV/OV < V_UV1/2
(Undervoltage)
FUV1/2 = 1, when
V_UV/OV > V_UV1/2 - 0.2V
and reset by a write operation
R1=182K
R2=10K
-48V
V_UV/OV
To Gate
-
Overvoltage Flag
Control
+
V_{OV Programmable}
VREF
-
+
UV flag_1
V_{UV1 Programmable}
VREF
-
+
UV flag_2
V_{UV2 Programmable}
VREF
2:1
Mux
To Gate
Control
Control
& Status
Registers
Fault Bits
FOV
FUV1/2
SMBus
SDA
SCL
BATT_ON
FIGURE 26. PROGRAMMABLE UNDERVOLTAGE AND
OVERVOLTAGE FOR PRIMARY AND BATTERY
BACKUP
Overcurrent Protection (Circuit Breaker Function)
The X80000 overcurrent circuit provides the following
functions:
• Overcurrent shut-down of the power FET and external
power good indicators.
• Noise filtering of the current monitor input.
• Relaxed overcurrent limits for initial board insertion.
• Overcurrent recovery retry operation.
• Flag of overcurrent fault condition.
• Flag of overcurrent retry failure.
A sense resistor, placed in the supply path between V_EE and
SENSE (see Figure 22) generates a voltage internal to the
X80000. When this voltage exceeds 50mV, an over current
condition exists and an internal “circuit breaker” trips, turning
off the gate drive to the external FET. The actual overcurrent
level is dependent on the value of the current sense resistor.
For example a 20mΩ sense resistor sets the overcurrent
level to 2.5A.
Intersil’s X80000 provides a safety mechanism during
insertion of the board into the back plane. During insertion of
the board into the backplane large currents may be induced.
In order to prevent premature shut down of the external FET,
the X80000 allows for a choice of up to 4 times the
overcurrent setting during insertion.
After the PWRGD signal is asserted, the X80000 switches
back to the normal overcurrent setting. The overcurrent
threshold voltage during insertion can be changed from
50mV to 100mV, 150mV, or 200mV, by setting bits in Control
Register CR4.
After the Power FET turns off due to an overcurrent
condition, a retry circuit turns the FET back on after a delay
of t_{SC_RETRY}. If the overcurrent condition remains, the FET
again turns off. This sequence repeats until the overcurrent
condition is released. There are various other options that
program the retry circuit to change the number of retries or
to not retry. An optional output signal, FAR, indicates a
failure after retry.
Overcurrent Shut-down
As shown in Figure 27, this circuit block contains a resistor
ladder, a comparator, a noise filter and a programmable
voltage reference to monitor for overcurrent conditions.
The overcurrent voltage threshold (V_OC) is 50mV. This can
be factory set, by special order, to any setting between
30mV and 100mV. V_OC is the voltage between the SENSE
and V_EE pins and across the R_SENSE resistor. If the
selected sense resistor is 20mΩ, then 50mV corresponds to
an overcurrent of 2.5A.
If an overcurrent condition is detected, the GATE is turned
off, all power good indicators go inactive and an overcurrent
failure bit (FOC) is set.
Overcurrent Noise Filter
The X80000 has a noise (low pass) filter built into the
overcurrent comparator. The comparator will thus ignore
current spikes shorter than 5µs. Other filter options are
provided by setting control bits in register CR4. The control
bits set the comparator to ignore current spikes shorter that
5µs, 10µs or 20µs and allow the filter to be turned off.
TABLE 4. NOISE FILTER FOR OVER CURRENTS
t_NF
F1
F0
(maximum noise input pulse width)
0
0
0µs
0
1
5µs
1
0
10µs
1
1
20µs
18
FN8148.0
March 18, 2005