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ISL76534 Datasheet, PDF (18/24 Pages) Intersil Corporation – 14-channel gamma references
Read Timing Diagram
ISL76534
SDA
(FROM MASTER)
START DEVICE ADDRESS W REGISTER POINTER
7 6 5 4 3 2 1 0 A7 6 5 4 3 2 1 0 A
STOP
WRITE
REGISTER
POINTER
SDA
(FROM SLAVE)
A
A
SCL
(FROM MASTER)
7 6 5 4 3 2 1 0A7 6 5 4 3 2 1 0A
Note: Send register pointer first to
indicate the READ-back starting location
SDA
(FROM MASTER)
START DEVICE ADDRESSR
76543210
START OF
SDA
READ (FROM SLAVE)
A
DATA M (MSB)
DATA M (LSB)
A
Note: If REGISTER POINTER = 0x00:
Byte 1 is NULL, Byte 2 is NULL
A
DATA M+1 (MSB)
DATA M+1 (LSB)
A
A
A
76543210 76543210
SCL
(FROM MASTER)
7 6 5 4 3 2 1 0A7 6 5 4 3 2 1 0A7 6 5 4 3 2 1 0A7 6 5 4 3 2 1 0A7 6 5 4 3 2 1 0A
DATA M+2 (MSB)
DATA M+2 (LSB)
STOP
SDA
(FROM MASTER) A
A
A
END OF
SDA
READ (FROM SLAVE)
(No ACK)
76543210 76543210
SCL
(FROM MASTER) A 7 6 5 4 3 2 1 0 A 7 6 5 4 3 2 1 0 A
Note: MSB Byte bits b7:b2
will always READ-back zero
NOTE: The READ operation can be stopped at any time after the DAC register data has been read by sending a STOP condition.
FIGURE 28. READ TIMING DIAGRAM
TABLE 5. DAC CALCULATION
b15
b14
b13
b12
b11
b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
1
0
1
1
1
0
1
0
1
0
29  1 + 28  0 + 27  1 + 26  1 + 25  1 + 24  0 + 23  1 + 22  0 + 21  1 + 20  0
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July 27, 2016