ISL3873 Datasheet, PDF(17/31 Page) Intersil Corporation – Wireless LAN Integrated Medium Access Controller with Baseband Processor

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ISL3873 Datasheet, PDF (17/31 Pages) Intersil Corporation – Wireless LAN Integrated Medium Access Controller with Baseband Processor

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ISL3873

memory devices at any CLKIN frequency. The MCLK

prescaler generates glitch free output when the divisor is

changed. This allows ï¬rmware to change the MCLK

frequency during operation, which is especially useful to

selectively reduce operating speed, thereby conserving

power, when full speed processing is not required.

XTALIN

22pF

Option Register (COR, bit 7). RESET originates from the

HOST system which applies RESET for at least 0.01ms after

VCC has reached 90% of its end value (see PC-Card

standard, Vol. 2, Ch. 4.12.1).

The MD[15:8] pin values are sampled during RESET or

Software Reset (SRESET). These pins have internal 50K

resistors. External pull-up or pull-down resistors (typically

10kâ¦) are used for bits which need to be conï¬gured

differently than the default.

XTALOUT

10Mâ¦

4700pF

FIGURE 11. 32.768kHz CRYSTAL

Power On Reset Conï¬guration

Power On Reset is issued to the ISL3873 with the RESET

pin or via the soft reset bit, SRESET, in the Conï¬guration

Table 3 summarizes the effect per pin. Table 4 provides the

MD15 and MD14 bit values required to allow the ISL3873 to

use Serial EEPROM option.

MD[11], StrIdle, has no equivalent functionality in any control

execution. This is used to allow the initial download of

ï¬rmware in âGenesis Modeâ. See the Hardware Reference

Manual for more details. The latch is cleared when the

Software Reset, SRESET, COR(7) is active.

TABLE 3. INITIALIZATION STRAPPING OPTIONS ON MBUS DATA PINS

BITS NAME DEFAULT

FUNCTION

15:14 NVtype[1:0]

Indicates type of serial NV memory to be read by initialization firmware in on-chip ROM.

Up to 8 NV device types can be encoded with (StrIdle or NVtype). If StrIdle = 0, NV memory holds a firmware

image, and NVtype identifies 1 of 4 âlargeâ (. = 128Kb) types. If StrIdle = 1, the NV memory just holds the CIS,

and NVtype identifies 1 of 4 âsmallâ (< = 8Kb) types.

13 SHIenable

Use the Serial Host Interface (USB), and disable all PC Card functions except attribute space, for access to the

COR and HCR for firmware debugging support. When = 0, use the Parallel Host Interface (PC Card or ISA).

4Wire

Use 4-wire interface to SRAM (CS-, OE-, WEH-, WEL-) the ISL3873 x8 SRAMs. When = 0 selects 5-wire

interface for use with x16 SRAM (CS-, OE-, WE-, UBE-, LBE-).

StrIdle

Start idle (wait for download from PC Card host interface).

10 Mem16

RAM and NV space at startup is x 16. When = 0 RAM and NV space at startup is x 8. If starting from off-chip NV

memory this setting must indicate the width of the startup Flash Memory. During initialization, firmware can set

separate widths or RAM and NV space in the Memory Control Register.

NVds

Disable mapping of off-chip control store to NV space (hence map off-chip control store to RAM space). When

= 0 off-chip control store is mapped to NV memory

ROMds

Disable on-chip control store ROM. When = 0 enable on-chip control store ROM.

7 ISAmode

Set host interface control signals and address decoding for PC card. When = 1 set host interface signals and

address decoding is for ISA bus, with all registers in I/O space and attribute space disabled. To use ISA mode,

PHIenable must be = 1 to enable a parallel host interface.

6 FCRinIO

Enable I/O space decoding for the physical FCRs. When = 1, the COR, CSR, and PRR registers are accessible

at I/O space offsets 0x40, 0x42, and 0x44 respectively. When = 0 these registers are only accessible in attribute

space. This bit is ignored when PHIenable = 0, and is overridden (forced = 1) when ISAmode =1. FCRinIO = 1

is useful for PC Card operation (PHIenable = 1, ISAmode = 0) to allow non-OS software to access the COR/HCR

in OS environments where the system software does not permit application software to access attribute space.b

5:0

Spare

0 x 00 Not assigned.

a. FCRinIO = 1 forces HAMASK [0] = 1 to expand I/O space decoding from 0 x 40 to 0 x 80 bytes.

TABLE 4. SERIAL EEPROM SELECTION

MD15

MD14

DEVICE TYPE

FUNCTION

AT45DB011

Large Serial Device used to transfer firmware to SRAM

24C08 (Note)

Small Serial Device which contains only CIS. MAC goes idle after loading CIS and waits for host.

None

Modes not supported in firmware at this time. Consult factory for additional device types added.

NOTE: The operating frequency of the serial port is 400kHz with a voltage of 3.3V.

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