ISL62873 Datasheet, PDF (14/17 Pages) Intersil Corporation – PWM DC/DC Controller with VID Inputs for Portable GPU Core-Voltage Regulator

ISL62873
ratings above the maximum input voltage and capable of
supplying the RMS current required by the switching circuit.
Their voltage rating should be at least 1.25x greater than the
maximum input voltage, while a voltage rating of 1.5x is a
preferred rating. Figure 10 is a graph of the input RMS ripple
current, normalized relative to output load current, as a
function of duty cycle that is adjusted for converter efficiency.
The ripple current calculation is written as Equation 27:
(
I_MAX2
⋅
(D
–
D²))
+
⎛
⎝
x
⋅
I_MAX2
⋅₁--^D--₂--
⎞
⎠
I_{IN_RMS}
=
----------------------------------------------------------------------------------------------------
I_MAX
(EQ. 27)
Where:
- I_MAX is the maximum continuous I_LOAD of the converter
- x is a multiplier (0 to 1) corresponding to the inductor
peak-to-peak ripple amplitude expressed as a
percentage of I_MAX (0% to 100%)
- D is the duty cycle that is adjusted to take into account
the efficiency of the converter
Duty cycle is written as Equation 28:
D
=
----------^V----^O------------
V_IN ⋅ EFF
(EQ. 28)
In addition to the bulk capacitance, some low ESL ceramic
capacitance is recommended to decouple between the drain
of the high-side MOSFET and the source of the low-side
MOSFET.
0.60
0.55
x=1
0.50
0.45
x = 0.75
0.40
0.35
x = 0.25
x = 0.50
0.30
0.25
0.20
x=0
0.15
0.10
0.05
00 _{0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0}
DUTY CYCLE
FIGURE 10. NORMALIZED RMS INPUT CURRENT FOR x = 0.8
Selecting The Bootstrap Capacitor
Adding an external capacitor across the BOOT and PHASE
pins completes the bootstrap circuit. We selected the
bootstrap capacitor breakdown voltage to be at least 10V.
Although the theoretical maximum voltage of the capacitor is
PVCC-V_DIODE (voltage drop across the boot diode), large
excursions below ground by the phase node requires we
select a capacitor with at least a breakdown rating of 10V. The
bootstrap capacitor can be chosen from Equation 29:
C_BO
O
T
≥
---^Q----^G-----^A----^T---^E----
ΔV_BOOT
(EQ. 29)
Where:
- Q_GATE is the amount of gate charge required to fully
charge the gate of the upper MOSFET
- ΔV_BOOT is the maximum decay across the BOOT
capacitor
As an example, suppose an upper MOSFET has a gate
charge, Q_GATE, of 25nC at 5V and also assume the droop in
the drive voltage over a PWM cycle is 200mV. One will find that
a bootstrap capacitance of at least 0.125µF is required. The
next larger standard value capacitance is 0.15µF. A good
quality ceramic capacitor such as X7R or X5R is
recommended.
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
Q_GATE = 100nC
0.4
0.2 _20nC
0.0
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
ΔV_{BOOT_CAP} (V)
FIGURE 11. BOOT CAPACITANCE vs BOOT RIPPLE VOLTAGE
Driver Power Dissipation
Switching power dissipation in the driver is mainly a function
of the switching frequency and total gate charge of the
selected MOSFETs. Calculating the power dissipation in the
driver for a desired application is critical to ensuring safe
operation. Exceeding the maximum allowable power
dissipation level will push the IC beyond the maximum
recommended operating junction temperature of +125°C.
When designing the application, it is recommended that the
following calculation be performed to ensure safe operation
at the desired frequency for the selected MOSFETs. The
power dissipated by the drivers is approximated as
Equation 30:
P
=
F_sw
(
1.5 V _U
Q
U
+
V_L
Q)
L
+
P_L
+
P_U
(EQ. 30)
Where:
- F_sw is the switching frequency of the PWM signal
- V_U is the upper gate driver bias supply voltage
- V_L is the lower gate driver bias supply voltage
- Q_U is the charge to be delivered by the upper driver into
the gate of the MOSFET and discrete capacitors
- Q_L is the charge to be delivered by the lower driver into
the gate of the MOSFET and discrete capacitors
- P_L is the quiescent power consumption of the lower
driver
- P_U is the quiescent power consumption of the upper
driver
14
FN6930.0
June 30, 2009